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Principal Test Engineer, Test Architecture

Renesas
September 19, 2026
Full-time
On-site
San Jose, California, United States
Test Engineering Jobs, Level - Senior

Job Title

Principal Test Engineer, Test Architecture

Role Summary

Lead test architecture and methodology for analog and mixed-signal semiconductor products. Provide technical leadership across design, product, and test engineering to define DFT, test infrastructure, and process improvements from new-product introduction through high-volume manufacturing.

Experience Level

Senior - typically requires 10+ years of experience in semiconductor test engineering or a closely related field.

Responsibilities

Primary responsibilities include setting strategy, driving technical solutions, and mentoring teams.

  • Define and drive test architecture, methodology, and innovation for analog and mixed-signal products.
  • Partner with IC design, product engineering, and test teams to establish design-for-test (DFT) requirements and improve testability.
  • Architect and optimize mixed-signal test hardware and software to improve test quality, throughput, cost, and manufacturability.
  • Evaluate and influence tester roadmap, test methodologies, and process improvements.
  • Provide technical leadership and mentor engineers on test strategies, best practices, and complex problem-solving.
  • Support new product introduction activities including customer samples, qualification, characterization, and production test systems.

Requirements

Must-have skills and relevant experience; nice-to-have items noted.

  • Extensive Automatic Test Equipment (ATE) development and production-test implementation experience on platforms such as Advantest 93K, ETS, Teradyne FLEX, Diamondx, LTX, SPEA, or similar.
  • Experience designing test hardware and software for mixed-signal wafer sort and final test.
  • Proven experience across new product introduction, qualification, characterization, and production test systems.
  • Experience testing analog, mixed-signal, data converters, power-management ICs; familiarity with digital interfaces and memory technologies.
  • Strong understanding of electrical engineering principles and the ability to debug complex mixed-signal test issues.
  • Nice-to-have: experience with analog/mixed-signal IC design, characterization, silicon validation, product engineering, or applications engineering.

Education Requirements

BS or MS in Electrical Engineering, Physics, or a related technical discipline is listed. Candidates with equivalent practical experience are acceptable. Candidates with backgrounds in product engineering, characterization, silicon validation, applications engineering, or analog/mixed-signal IC design will be considered.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-09-02