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Principal Technical Program Manager - DTCO & Design Technology Integration

Intel Corporation
October 20, 2026
Full-time
Remote friendly (Hillsboro, Oregon, United States)
Worldwide
$220,320 - $311,040 USD yearly
Semiconductor IP Jobs, Level - Senior

Job Title

Principal Technical Program Manager - DTCO & Design Technology Integration

Role Summary

Lead technical programs for Intel's Advanced Design and Foundational IP (AD-FIP) within the Design Technology Platform (DTP). Drive design-technology co-optimization (DTCO), foundational IP and reference/test IP development, and cross-functional execution across engineering, foundry customers, EDA vendors, and ecosystem partners.

The role combines technical credibility in circuit/system design with program leadership to enable delivery of strategic design-technology initiatives and organizational processes.

Experience Level

Senior (Principal). Experience guidance provided by Intel: Bachelor's +12 years, Master's +8 years, PhD +6 years.

Responsibilities

Accountable for program leadership, stakeholder alignment, and technical integration across AD-FIP and external partners.

  • Drive and deliver large, cross-functional technical programs spanning circuit design, DTCO, and foundational IP development.
  • Align technical vision with organizational strategy and accelerate execution across DTP and Intel Foundry stakeholders.
  • Lead customer-facing technical engagements for lead customers; shape messaging and ensure technical alignment.
  • Coordinate external engagements with EDA vendors and ecosystem partners to co-develop technology definition and design enablement.
  • Define and improve organizational processes: hiring, workforce development, training, budget planning, and program governance.
  • Mentor and coach engineering teams; act as a change agent to drive continuous improvement and high performance.
  • Synthesize complex technical and operational information for senior leadership and represent AD-FIP in key forums.

Requirements

Core technical, program management, and leadership qualifications required to perform the role.

  • Must-have: Deep technical credibility in circuit and/or system design and the ability to analyze and solve engineering challenges.
  • Must-have: Proven experience managing large-scale engineering programs or teams in hardware, platform, or manufacturing domains.
  • Must-have: Strong cross-functional communication, stakeholder management, and executive influence skills.
  • Must-have: Proficiency with engineering project management tools and program management methodologies.
  • Must-have: Demonstrated leadership in coaching, mentoring, and developing engineering teams.
  • Must-have: Ability to innovate processes to improve organizational effectiveness and program outcomes.
  • Must-have: Must be able to pass an extended background investigation (Position of Trust).
  • Nice-to-have: Experience coordinating with EDA vendors and external ecosystem partners on DTCO or technology definition.
  • Nice-to-have: Prior experience in foundry/customer-facing technical roles or defining foundational IP and design enablement strategies.

Education Requirements

Degree in engineering or a related field required. Intel's experience equivalence: Bachelor's degree with 12+ years relevant experience; Master's degree with 8+ years; PhD with 6+ years. Equivalent practical experience may be considered in place of formal degree where noted by the employer.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-10-15