Job Title
Principal Technical Manager, Foundry Technology
Role Summary
Technical lead in Foundry Technology (Central Engineering) responsible for tape-out/NPI launch, yield and quality management, and mass-production ramp of Marvell SoCs. Acts as primary technical interface between foundry partners, internal engineering teams (design, PE/TE, QA/Rel), supply chain, and customers.
Experience Level
Senior — minimum 10 years of experience in semiconductor technology development, process integration, product engineering, or foundry/fab roles.
Responsibilities
Key responsibilities focus on enabling successful product launches, improving manufacturing yield and reliability, and driving production quality.
- Serve as primary technical interface among foundry, Marvell functional teams, and external customers for tape-out, NPI launch, and yield/quality issues.
- Lead NPI efforts to achieve high-volume, accelerated production ramp-up.
- Identify potential reliability risks and manufacturing weaknesses; drive root-cause analysis and corrective actions prior to production.
- Coordinate process targeting to optimize device performance and production supply.
- Deliver device performance optimization, yield improvement, wafer acceptance testing (WAT) analysis, and process/fab qualification.
- Ensure production quality via inline monitoring, statistical process control (SPC) reviews, DPPM reduction, and customer-return defect management.
- Collaborate cross-functionally with design, PE/TE, QA/Rel, and supply chain to resolve manufacturing and reliability issues.
Requirements
Must-have technical skills, experience, and personal qualities for the role.
- At least 10 years' experience in semiconductor technology development, fab process integration, product engineering, or foundry management.
- Proven expertise in silicon manufacturing technology, yield enhancement, reliability engineering, SPC, and failure analysis.
- Experience with NPI, tape-out support, and production ramp processes.
- Strong problem-solving skills, execution-oriented mindset, and ability to work independently and as part of a team.
- Excellent verbal and written communication; able to interact effectively with operations and engineering teams.
- Nice-to-have: experience with Chip Package Integration (CPI) and Co-Package Optics (CPO) projects.
Education Requirements
MS degree or higher in Engineering or Science (examples: Electrical/Electronic Engineering, Physics, Electro-Physics, Materials Engineering).
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Date Posted: 2026-05-08