Principal System Power Management and Performance Architect
NVIDIAJob Title
Principal System Power Management and Performance Architect
Role Summary
Join the Silicon Co-Design Group (SCG) to define and deliver system-level power, performance, and thermal architecture that spans multiple silicon generations. The role converts ambiguous workload, silicon, firmware, and platform interactions into robust architecture and product features.
Experience Level
Senior — typically 15+ years of system architecture, development, and validation experience focused on power and performance-per-watt in datacenter or high-performance platforms.
Responsibilities
Lead architecture and integration of system-level power and performance features across products and generations, and collaborate with architecture, ASIC, board/platform, and firmware teams.
- Define multi-generation roadmaps for system-level power and performance features based on prototyping, use-case analysis, and cost/benefit trade-offs.
- Own architecture and integration strategy for HSIO power management, DVFS, P-states, and low-power features across product lines.
- Lead system-level boot and IST architecture, including initialization, sequencing, and recovery of power and clock domains across multi-IP systems.
- Drive datacenter-scale power management strategy, including rack-level telemetry and platform state coordination for high-performance environments.
- Identify and redesign system-level processes (boot/reset flows, entry/exit low-power sequences, control-system policies) when prior designs no longer meet new product needs.
- Serve as a multi-functional technical authority influencing architecture, ASIC, firmware, and platform decisions made by cross-functional teams.
Requirements
Must-have technical experience and demonstrated impact; list separates core requirements from differentiators.
- 15+ years of hands-on system architecture, development, and validation with a focus on power and performance-per-watt in datacenter or high-performance platforms.
- Proven track record of guiding architecture decisions that shipped across multiple silicon programs; able to present specific examples with rationale and outcomes.
- Extensive, practical knowledge of HSIO power management, DVFS, P-states, system boot flows, and low-power entry/exit architecture and how these interact with IP, firmware, and platform layers.
- Strong fundamentals in low-power design, power management techniques, and rack-level performance architecture.
- Ability to take ambiguous product-level power/performance problems from concept through silicon correlation to release trade-offs and to influence cross-team decisions.
Nice-to-have:
- Deep, hands-on ownership in at least two areas such as system power management, robust boot flow optimizations, HSIO, or memory power management.
- Visible technical leadership: patents, publications, conference talks, standards participation, or other industry recognition.
- Demonstrated disciplined use of AI/agentic workflows to accelerate engineering while applying strong judgment.
Education Requirements
BS or MS in Electrical Engineering or Computer Engineering, or equivalent practical experience as explicitly stated in the posting.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
