Principal/Staff Engineer, DFT Engineering

Role Summary

The Principal/Staff Engineer, DFT Engineering will join the DCE CCS Hardware Group at Marvell, focusing on Design for Test (DFT) innovation for next-generation compute and storage silicon. The role involves shaping efficient, high-quality product delivery that meets global data needs.

Experience Level

Mid-level, with a minimum of 4 years of experience in Design for Test (DFT).

Responsibilities

The key responsibilities include:

• Owning DFT design flow control, updates, QA, and deployment for project teams.
• Enhancing and maintaining DFT flows using Siemens Tessent and latest EDA capabilities.
• Collaborating with local and global teams to implement DFT features and ensure smooth adoption.
• Driving DFT automation and continuous improvement to enhance design processes.

Requirements

The following skills and experiences are essential:

• Education: Bachelor’s or Master’s in Electrical/Computer Engineering, Computer Science, or a related technical field.
• Experience: 4+ years in Design for Test (DFT) with a solid understanding of ASIC design flows.
• Expertise: Knowledge of Scan/Compression, MBIST, BSCAN, ATPG, and DFT design automation.
• Tools: Proficiency in Siemens Tessent, VCS, ModelSim, or Xcelium.
• Mindset: Requires a curious, collaborative, and proactive approach with good English communication skills.

Education Requirements

Bachelor’s or Master’s degree in Electrical/Computer Engineering, Computer Science, or a related field is required.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.