Principal STA/Sign-Off Engineer

Job Title

Principal STA/Sign-Off Engineer

Role Summary

Member of the IP Digital Design Methodology team responsible for defining and deploying ASIC signoff standards and flows for IP and SoC designs. The role partners with global IP development teams on next-generation SerDes, memory interface controllers, PHYs, and subsystems.

Experience Level

Senior — requires 12+ years of hands-on experience in STA/signoff and CAD flows for high-speed digital IP cores and/or SoCs.

Responsibilities

Deliver and maintain signoff methodologies, collaborate with tool and design teams, and improve design flows and documentation.

• Develop and deploy advanced-node timing signoff and signoff-level methodologies for IP and SoC designs across multiple foundries.
• Drive PPA improvements for high-speed IP designs through analysis and methodology enhancements.
• Evaluate and exercise signoff flows covering timing, power, physical verification, EM/IR analysis, and ECOs.
• Create and maintain documentation, automation scripts, and training materials for digital design methodologies.
• Act as liaison between Synopsys tool teams and internal/external IP design teams to resolve flow and signoff issues.
• Continuously refine processes to improve efficiency and quality of deliveries.

Requirements

Must-have technical skills and experience, followed by common nice-to-have items.

• Must-have: 12+ years hands-on experience developing CAD flows for high-speed digital IP cores and/or SoCs, including enabling advanced-node STA/timing signoff at SoC level.
• Must-have: Practical knowledge of ASIC implementation and physical design flows, memories, logic libraries, and PDK usage.
• Must-have: Strong analysis, debugging, and problem-solving skills; ability to create clear documentation and training materials.
• Must-have: Demonstrated ability to collaborate across functions and with global teams to drive results.
• Nice-to-have: Familiarity with EM/IR and thermal signoff flows.
• Nice-to-have: Experience with Synopsys tools such as StarRC and ICV.
• Nice-to-have: Working knowledge of high-speed interface protocols (HDMI, MIPI, PCIe, SATA, Ethernet, USB, DP, DDR).

Education Requirements

BS or MS in Electrical Engineering (EE).

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.