Principal Software Engineer - Compiler Development

Job Title

Principal Software Engineer - Compiler Development

Role Summary

Work on the Xcelium compiler and code generator within the System Verification Group to architect and implement high-performance compiler components for large-scale hardware verification. The role focuses on compiler architecture, performance engineering, and language evolution to support increasingly complex AI and hyperscale chip designs.

Experience Level

Senior. Candidates should have substantial industry experience; see Education Requirements for degree-specific experience thresholds. The role expects significant hands-on compiler or EDA experience (see Requirements).

Responsibilities

Primary responsibilities include designing and delivering compiler technology and optimizing performance for large designs.

• Design and implement SystemVerilog language extensions and compiler front-end features.
• Architect and optimize compiler intermediate representations and code generation to scale to multi-billion gate designs.
• Perform deep bottleneck analysis and implement performance and memory optimizations in C/C++.
• Design compiler and simulator features tuned for complex AI and NPU architectures.
• Prototype and research innovative features such as LLM-enhanced compilation, parallel and distributed compilation.
• Collaborate with verification and simulation teams to ensure compiler integrations meet production needs.

Requirements

Must-have technical skills and experience.

• 5+ years in compiler development, EDA, or high-performance computing.
• Expert-level C++ (modern standards) and strong knowledge of SystemVerilog or Verilog.
• Proven understanding of compiler theory: lexing, parsing, semantic analysis, and code generation.
• Experience with multi-threading, memory management, and cache-locality optimizations.
• Demonstrated ability to analyze and optimize performance on large-scale codebases.
• Inventive problem-solving mindset and experience driving technical improvements in production tools.

Nice-to-have:

• Familiarity with LLVM or similar compiler frameworks.
• Experience with Python for tooling and test automation.
• Familiarity with hardware verification environments (UVM).

Education Requirements

Required: one of the following experience/degree combinations: BS with a minimum of 10 years of experience, MS with a minimum of 7 years of experience, or PhD with a minimum of 5 years of experience. (No specific fields of study were specified in the posting.)

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.