Principal SoC DFT Engineer, HBM

Job Title

Principal SoC DFT Engineer, HBM

Role Summary

Lead DFT architecture, implementation, and signoff for HBM base-die SoC designs within the Heterogeneous Integration Group. Work with RTL, verification, physical design, product engineering, test, and manufacturing teams from pre-silicon through tapeout and silicon bring-up.

Experience Level

Senior level - typically requires 10+ years of relevant SoC, DFT, or ASIC implementation experience.

Responsibilities

Design and deliver robust, scalable test solutions for HBM base-die SoCs and drive DFT execution across the chip delivery flow.

• Own SoC-level DFT implementation: scan, MBIST/LBIST, boundary scan (JTAG), and test access architectures.
• Define DFT architecture early and align with integration, floorplanning, timing, power, and physical design.
• Implement and integrate DFT logic at block, subsystem, and full-chip levels.
• Execute DFT signoff: lint, CDC, DFT rule checks, ATPG readiness, and coverage closure.
• Collaborate with physical design to optimize DFT for placement, routing, timing closure, and DRC/LVS.
• Support pre-silicon debug and post-silicon bring-up, yield analysis, and diagnostics.
• Partner with CAD and methodology teams to standardize and improve DFT flows across programs.
• Mentor junior engineers and drive innovation for future HBM generations.
• Develop Gen-AI driven tools, workflows, and methodologies to enhance DFT productivity.

Requirements

Key technical skills and experience required or strongly preferred.

• Hands-on SoC DFT architecture and implementation experience.
• Practical experience with scan insertion, MBIST/LBIST architectures, JTAG/boundary scan, and ATPG concepts.
• Familiarity with full RTL-to-GDS flows and interactions between DFT, synthesis, STA, and physical design.
• Experience with large, complex SoCs integrating multiple IPs and subsystems.
• Proficiency with industry EDA tools (Siemens, Synopsys, Cadence) for DFT and implementation.
• Strong RTL debugging and design analysis skills.
• Scripting for flow automation (Python, Tcl, Perl, etc.).
• Excellent problem-solving, communication, and cross-functional collaboration skills.
• Familiarity with memory systems (DRAM/HBM) and JEDEC specs is a strong plus.

Education Requirements

Bachelor's degree or higher in Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.