Principal Silicon Security Architect

Job Title

Principal Silicon Security Architect

Role Summary

Lead security architecture for Microsoft custom silicon and SoC platforms within Compute Silicon & Manufacturing Engineering (SCHIE). Translate product threats, customer requirements, and platform goals into actionable hardware, firmware, and software security architectures from concept through production and post-silicon closure.

Worksite: hybrid (3 days/week in-office, Redmond, WA). Travel: less than 25%.

Experience Level

Senior-level. Typical candidates have 8+ years of relevant technical engineering experience; preferred 15+ years. (See Education Requirements for degree/equivalent experience combinations.)

Responsibilities

Lead security architecture and drive cross-functional alignment; primary responsibilities include:

• Lead end-to-end security architecture for complex SoCs and silicon subsystems from requirements and threat analysis through signoff, implementation, validation, production, and post-silicon issue resolution.
• Define SoC security framework, trust boundaries, security objectives, assets, attacker models, and hardware/firmware/software responsibilities.
• Perform threat modeling and security risk assessments across hardware, firmware, software, microarchitectural, supply-chain, lifecycle, and physical attack surfaces and drive mitigations.
• Architect hardware roots of trust, secure/measured boot, attestation, key management, provisioning, lifecycle states, secure recovery, and firmware update mechanisms.
• Design isolation and confidential-computing architectures (TEEs, memory/I/O protection, access control, privilege boundaries, virtualization) for multi-tenant platforms.
• Specify secure debug, telemetry, error handling, anti-rollback, tamper response, and manufacturing/field-service security while preserving diagnosability and supportability.
• Define cryptographic service and acceleration requirements; evaluate algorithms, protocols, entropy sources, and implementation tradeoffs for performance, power, area, assurance, and agility.
• Assess side-channel, fault-injection, replay, rollback, and microarchitectural threats; partner with design and validation teams on mitigations and security test strategies.
• Author testable security requirements and architecture specifications; maintain traceability and establish verification, validation, and signoff criteria.
• Evaluate internal and third-party security IP; lead architecture reviews and provide data-driven recommendations on assurance, PPA, cost, schedule, reuse, and risk.

Requirements

Must-have qualifications and constraints for successful performance in the role:

• Proven track record leading security architecture for SoCs or silicon platforms across architecture, implementation, and post-silicon validation.
• Deep knowledge of hardware roots of trust, secure boot, attestation, provisioning, lifecycle management, and secure firmware update mechanisms.
• Strong expertise in cryptographic primitives, key management, entropy sources, crypto agility, and hardware crypto integration.
• Experience identifying and mitigating physical and microarchitectural attacks, including side-channel and fault-injection threats.
• Ability to author clear, testable security requirements and drive verification and validation strategies (including penetration testing, emulation, or formal methods).
• Experience evaluating and integrating third-party security IP and collaborating with external silicon vendors and manufacturing partners.
• Ability to meet Microsoft security screening and export-control eligibility requirements; must be able to provide proof of citizenship or residency as required for access to export-controlled information.
• Strong cross-functional collaboration and influencing skills at Principal scope; ability to resolve conflicting requirements and align stakeholders.

Nice-to-have:

• Experience with data-center, cloud, client, gaming, AI accelerator, or server-class SoCs.
• Familiarity with IOMMU/SMMU, virtualization, secure DMA, PCIe architecture, and high-speed I/O subsystems.
• Experience with security standards or certifications such as FIPS 140-3, TCG/DICE/SPDM, CNSA, or Common Criteria.
• Experience applying AI-assisted tools to architecture research or specification development.

Education Requirements

Employer-stated combinations: Doctorate (EE/CE/CS or related) with 3+ years technical engineering experience; or Master's (EE/CE/CS or related) with 6+ years; or Bachelor's (EE/CE/CS or related) with 8+ years; or equivalent practical experience. Fields referenced: Electrical Engineering, Computer Engineering, Computer Science, or related technical disciplines. Equivalent experience acceptable.

Typical base pay range across the U.S.: USD $142,800 - $274,800 per year; higher ranges apply for the San Francisco Bay Area and New York City metropolitan area. See pay information.

About the Company

Company: Microsoft

Headquarters: Redmond, Washington, United States

Microsoft is a global technology company that develops and sells software, services, devices, and solutions. Known for its Windows operating system, Office suite, and Azure cloud platform, Microsoft aims to empower individuals and organizations around the world to achieve more. The company fosters a culture of innovation and inclusion, focusing on delivering trusted experiences to customers and partners globally.