Principal Signal Integrity Engineer / Principal Hardware Design Engineer - PCB/SOC Validation

Job Title

Principal Signal Integrity Engineer / Principal Hardware Design Engineer - PCB/SOC Validation

Role Summary

Individual contributor on the Central Engineering PCB team responsible for design, simulation, and validation of SOC/package/board-level high-speed interfaces and SOC validation boards.

Main mission: set signal-integrity (SI) specifications and implementation guidelines, perform EM and circuit simulations, validate board and package electrical behavior, and collaborate with package, board routing, and characterization teams to ensure reliable high-speed operation.

Experience Level

Senior (Principal). Typical expectation: 5-10 years of relevant industry experience for candidates with a Bachelor's degree; candidates with advanced degrees may have different experience ranges.

Responsibilities

Core responsibilities include technical ownership of SI for validation boards and collaboration across engineering teams.

• Define and document SI specifications and implementation guidelines for internal and external design teams.
• Perform 2D/3D EM and circuit simulations to validate board, package, and interconnect designs.
• Model and analyze transmission lines, via structures, connectors, and complex BGA packages.
• Collaborate with package, board routing, and characterization teams to align design parameters and measurement results.
• Support SOC validation board design, bring-up, and troubleshooting activities.
• Communicate technical findings to customers and cross-functional project stakeholders.

Requirements

Must-have technical skills and experience.

• Proven experience as a lead Signal Integrity engineer or equivalent technical lead role.
• Strong understanding of electromagnetic fundamentals and high-speed signal behavior.
• Proficiency with 2D/3D EM tools (e.g. Sigrity Suite, Ansys EM) and circuit simulators such as HSPICE.
• Familiarity with real-time oscilloscopes, TDR measurements, and scripting (e.g. VBA) for data analysis.
• Experience analyzing high-speed SERDES interfaces (example: 25 Gbps class and above).
• Experience establishing SI parameters to guide board routing and layout teams.
• Strong verbal and written communication; experience interfacing with customers and cross-functional teams.

Nice-to-have:

• Experience with ADS, QSI/QDC, HyperLynx or similar tools.
• Experience setting up, running, and summarizing power integrity simulations.
• Experience coordinating with characterization teams to correlate simulations with measured board/package results.

Education Requirements

Bachelor's degree in Computer Science, Electrical Engineering, or a related field (typical hiring profile: Bachelor's + ~5-10 years' related experience). Advanced degrees (Master's or PhD) in Computer Science, Electrical Engineering, or related fields are recognized (typical hiring profile: Master's/PhD + ~3-5 years' related experience).

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.