Principal RTL Design Engineer

Job Title

Principal RTL Design Engineer

Role Summary

Lead RTL design and implementation for complex ASIC/SoC blocks within the ASIC Digital Design organization. Work closely with architecture, verification, physical design and system teams to deliver high-quality RTL ready for synthesis and timing closure.

This is an onsite engineering role based in Bengaluru focused on delivery, technical leadership, and mentoring within the digital design team.

Experience Level

Senior / Principal. Specific years of experience not specified in the posting.

Responsibilities

Core responsibilities include implementation, integration and technical leadership across RTL design activities:

• Develop and deliver RTL (SystemVerilog/VHDL) for digital blocks from micro-architecture to gated, synthesizable code.
• Collaborate with architects and verification teams to translate specifications into RTL and verification plans.
• Drive timing closure, synthesis readiness, and performance/power/area trade-offs with EDA tools and flows.
• Perform RTL reviews, lint checks, and ensure coding standards and design-for-testability practices are met.
• Work with backend/physical design teams to resolve timing, power and integration issues.
• Mentor junior engineers and lead design reviews to ensure quality and schedule targets are met.

Requirements

Essential and preferred technical skills for successful candidates:

• Must-have: Strong RTL design skills (SystemVerilog/VHDL), experience delivering synthesizable RTL for ASIC/SoC projects.
• Must-have: Practical knowledge of synthesis flows, timing closure, constraint development and static timing analysis.
• Must-have: Experience collaborating with verification, architecture and physical design teams in an ASIC design flow.
• Must-have: Proficiency with EDA toolchains (synthesis, simulation, linting) and scripting for automation (Tcl, Python, Shell).
• Nice-to-have: Prior experience with low-power design techniques, clock-domain crossing, and DFT/test insertion practices.
• Nice-to-have: Experience with IP integration, SoC-level bring-up, or domain-specific accelerators.

Education Requirements

Not specified.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.