Principal R&D Engineer

Job Title

Principal R&D Engineer

Role Summary

Senior technical role on Advanced Node Methodology and R&D focused on closing Power, Performance, Area (PPA) and runtime gaps for high-performance designs using Fusion Compiler. Works with internal R&D, methodology teams, customers, and foundries to prototype solutions, influence EDA engine capabilities, and validate methodologies through benchmarking and tape outs.

Experience Level

Senior — Principal level. The posting specifies 12+ years of hands-on EDA product development, deployment, and full-flow benchmarking experience.

Responsibilities

Deliver and validate advanced physical-design methodologies and tool-level prototypes that improve PPA and turnaround for high-performance designs.

• Partner with Advanced Node Methodology and R&D teams to drive PPA closure using Fusion Compiler.
• Map design requirements and DTCO optimizations to EDA engine capabilities and propose measurable improvements in power, performance, area, and runtime.
• Prototype practical solutions and workflow extensions using TCL and Perl to validate or extend engine functionality.
• Collaborate with foundry partners to influence technical strategy and enable advanced nodes (2nm, 1.4nm, and beyond).
• Analyze and improve RTL2GDS flows, identify timing and critical-path issues, and propose methodology or algorithm changes.
• Lead benchmarking and tape-out validation on real high-performance core designs.
• Provide technical guidance and mentorship to internal teams and external customers on advanced-node physical design topics.

Requirements

Must-have technical skills and experience.

• Extensive experience with RTL-to-GDSII flows, including synthesis, place & route, and physical verification for high-performance cores.
• Strong scripting skills in TCL and Perl for prototyping and workflow automation.
• Hands-on experience with advanced node technologies (2nm, 1.4nm and below), including Backside Routing and standard-cell library analysis.
• Deep understanding of synthesis and P&R engine interactions and how they affect quality of results (QoR).
• Proven track record in EDA product deployment, full-flow benchmarking, and participation in tape outs.
• Experience collaborating directly with foundries and customers to influence process-tool co-optimization.

Nice-to-have:

• Experience with synthesis/optimization cell selection.
• Prior experience influencing core engine development or contributing to engine-level improvements.

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, or a closely related field. The posting specifies 12+ years of relevant hands-on EDA product development, deployment, and full-flow benchmarking experience; no separate equivalent-experience language was provided.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.