Principal Product Engineer, Synthesis

Job Title

Principal Product Engineer, Synthesis

Role Summary

Drive product engineering for Genus Synthesis Solution to improve power, performance, and area (PPA) for modern digital ASICs. Work closely with R&D to define product direction and implement solutions that bridge logic synthesis and place-and-route.

Act as a technical liaison between R&D, field engineers, and customers; verify feature correctness, run experiments, and document product requirements.

Experience Level

Senior-level (Principal). The posting does not specify overall required years of experience.

Responsibilities

Core responsibilities include implementing and validating synthesis features, supporting customers, and ensuring interoperability with Cadence digital tools.

• Perform product engineering work for Genus synthesis to achieve best-in-class PPA for digital ASICs.
• Understand internal Genus flows for new features; verify correctness and run experiments to determine optimal solutions.
• Solve problems in physical-aware synthesis to narrow the gap between synthesis and place & route.
• Support field engineers and customers as the first line of technical interface for R&D and customers.
• Verify interoperability of Genus with other Cadence digital implementation tools to enable seamless flows.
• Gather requirements from internal and external customers and document Product Requirement Specifications (PRS).

Requirements

Key skills and experience expected. Items marked "(nice-to-have)" are preferred but not mandatory.

• Must-have: Strong logic design and timing-closure skills; proven ability to debug complex timing, logical, and physical design problems and perform root-cause analysis.
• Must-have: Automation skills using Perl, Tcl, and shell scripting (essential).
• Must-have: Strong analytical skills and experience working in fast-paced engineering environments.
• Nice-to-have: Experience with Genus, Innovus, or other EDA tools in the digital implementation flow, especially at advanced nodes (28nm and below / 20nm or below).
• Nice-to-have: Prior designer, product engineering, or application engineering experience in digital implementation and sign-off domains.
• Nice-to-have: Knowledge of HDLs such as Verilog or SystemVerilog.

Education Requirements

Preferred: MS in Electrical Engineering or ECE with a focus on VLSI; posting specifies two or more years of relevant industrial experience. (No other degree, certification, or "equivalent experience" language was stated.)

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.