Principal Product Engineer – Digital & Signoff Group (DSG)

Job Title

Principal Product Engineer – Digital & Signoff Group (DSG)

Role Summary

Product engineer on the Cadence Digital & Signoff Group (DSG) team responsible for bridging R&D, application engineering, and customers to drive adoption and improvement of physical-design and signoff tools.

The role focuses on enabling RTL-to-GDSII flows, resolving tool issues, and delivering methodology and benchmarking for advanced-node designs (7nm and below).

Experience Level

Senior-level. See Education Requirements for explicit years-of-experience guidance.

Responsibilities

Primary responsibilities include technical leadership, customer support, and methodology development for advanced-node physical design and signoff.

• Act as primary place-and-route (P&R) and signoff technical resource for internal teams and external customers.
• Work with R&D to track, diagnose, and resolve software issues across the toolchain.
• Develop and deploy RTL-to-GDSII methodologies, scripts, and customized flows to meet customer design goals.
• Execute competitive and internal benchmarks to demonstrate Power, Performance, and Area (PPA) advantages.
• Collaborate with Product Marketing and product teams to align technical capabilities with customer roadmaps.
• Support customer engagements and complex debug for timing closure and signoff at advanced nodes.

Requirements

Must-have technical skills and experience; education details are in the Education Requirements section below.

• Deep knowledge of the full ASIC design flow (RTL-to-GDSII), with emphasis on physical design and timing analysis.
• Proven hands-on experience with timing closure and PPA optimization at advanced nodes (7nm, 5nm, or below).
• High familiarity with industry-standard EDA tools for synthesis, placement, routing, and signoff.
• Proficiency in scripting languages such as Tcl, Python, or Perl.
• Strong verbal and written communication skills to convey technical issues and solutions.
• Ability to run and interpret design benchmarks and metrics for PPA.

Nice-to-have:

• Familiarity with AI-driven productivity tools and workflows.

Education Requirements

Bachelor's in Electronics Engineering (EE) with 6+ years of industry experience, OR Master's in Electronics Engineering (EE) with 4+ years of digital implementation experience. (Source specifies EE degrees and the corresponding years of experience.)

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.