Principal Package Engineer

Job Title

Principal Package Engineer

Role Summary

Architect and deliver advanced multi-die IC packages for high-performance AI accelerators, focusing on package architecture, substrate design, manufacturability, thermal and electrical performance, and vendor engagement.

Work closely with IC design, physical design, SI/PI, and board teams and manage subcontractors and OSAT/TSMC interactions to move packages from concept through qualification.

Experience Level

Senior-level (Principal). Years of experience: Not specified.

Responsibilities

Primary responsibilities include package selection, specification, cross-team collaboration, and vendor management through design and qualification.

• Select and design optimal multi-die package types (MCM, 2.5D, 3D, fan-out, CoWoS, InFO, CPC, CPO) balancing electrical performance, thermal behavior, cost, and manufacturability.
• Define package specifications, bump/ball maps, interposer requirements, and mechanical constraints.
• Specify substrate stack-ups, bump pitch/ball pitch, routing, via structures, and material choices to meet performance and manufacturability targets.
• Perform high-speed signal escaping, routing, and power distribution network design and coordinate SI/PI requirements.
• Manage subcontractors and engage with TSMC and OSAT partners on bumping, substrate options, and advanced packaging flows.
• Support package-level bring-up, failure analysis, debug, and qualification activities.
• Evaluate emerging packaging technologies and drive adoption for next-generation products.
• Partner with IC design, physical design, SI/PI, and board teams to ensure system-level requirements are met.

Requirements

Must-have technical skills and experience for immediate impact; listed items are required unless noted as "nice-to-have."

• Experience with multi-die package design and UCIe (AP/SP) integration.
• Understanding of substrate materials, stack-ups, and mechanical constraints.
• Familiarity with SI/PI concepts to collaborate with electrical engineering teams.
• Experience managing packaging subcontractors and engaging with OSAT/TSMC partners on packaging flows and bumping.
• Proven experience supporting package bring-up, failure analysis, debug, and qualification.
• Ability to define package specifications and work cross-functionally with IC and board teams.
• Nice-to-have: Experience with package modeling tools such as HFSS or Cadence Sigrity.

Education Requirements

B.S. or M.S. in Electrical Engineering or a related field.

About the Company

Company: Delos Data

Headquarters: Palo Alto, CA, United States

Stealth-mode Silicon Valley startup building foundational technology to improve performance, scalability, and resiliency of large-scale AI data center clusters. Backed by venture capital and led by experienced founders, the company develops hardware/software solutions and operates across U.S. and Canadian locations.