Principal Package Design Engineer

Job Title

Principal Package Design Engineer

Role Summary

Responsible for designing and qualifying semiconductor package and interconnect solutions for power SiP/modules, flip-chip LGA, multi-chip modules and power device packaging. Collaborates with product, reliability, quality, operations and external assembly subcontractors (OSAT/CM) to develop processes, qualify materials and transition designs into production for consumer, industrial and automotive power applications.

Experience Level

Senior - typically 10–15 years of relevant package development experience.

Responsibilities

Primary responsibilities include package design, qualification, process optimization and production support.

• Design and develop package and interconnect methods for power SiP/modules, flip-chip LGA, multi-chip module with substrate or embedded die/capacitor, and power device packaging.
• Qualify package technologies for consumer, industrial and automotive power applications.
• Benchmark, select and qualify suitable materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM).
• Work with OSAT/CM to run DOE, optimize processes and establish process specifications.
• Coordinate with product and reliability teams to qualify new packages and processes within required time frames.
• Resolve process integration issues and ensure critical window checks on key process steps.
• Establish production controls, monitor ramp-up and ensure high quality during production transition.
• Monitor and resolve process issues early in production to prevent quality incidents.
• Maintain technical expertise on advances in power SiP/modules, wafer-level packaging and flip-chip interconnects; contribute to packaging roadmap and execution.
• Address internal and external customer complaints in coordination with marketing, product, quality and operations.
• Establish and maintain package design rules.

Requirements

Must-have technical skills and experience; educational requirements are summarized separately below.

• 10–15 years experience in package development emphasizing power SiP/module, wafer-level and flip-chip LGA packaging.
• Strong understanding of power SiP/modules with substrate or embedded die/capacitor and associated assembly processes.
• Experience with qualification methods, SPC and statistical analysis software.
• Experience working with OSAT/CM to develop and optimize processes and establish production controls.
• Strong interpersonal, communication, analytical and presentation skills.
• Knowledge of Cu FSM/BGBM technologies is a plus.

Education Requirements

Doctorate, Master’s or Bachelor’s degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.