Principal or Senior Staff Analog Design Engineer
Lead analog design for high-speed SERDES transceivers. Responsible for architecture definition, circuit design, simulation, verification, and coordination with digital and CAD teams to deliver production-quality SERDES IP.
Work within a collaborative analog and mixed-signal design team focused on 224-Gb/s Ethernet SerDes transceivers for network and data-center SoCs.
Senior — Principal / Senior Staff level. See Education Requirements for specific years-of-experience guidance linked to degree level.
Core responsibilities include architecture, design, verification, and documentation of SERDES analog blocks and support for post-silicon activities.
Must-have technical skills and experience; degree-specific experience levels are listed under Education Requirements.
Ph.D. in a relevant technical field with 6+ years of analog IC design experience, or M.Sc. with 8+ years of analog IC design experience. Background should emphasize analog/mixed-signal circuits, transistor-level CMOS design, and SERDES-related work.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
