Principal Memory Design Engineer, HBM

Job Title

Principal Memory Design Engineer, HBM

Role Summary

Design, simulate, and optimize DRAM circuits and associated digital/analog blocks for high‑bandwidth memory (HBM) products. The role leads circuit and layout decisions, drives simulation-to-silicon validation, and collaborates across design, verification, product engineering, test, process integration, and manufacturing to deliver manufacturable, high-quality memory solutions.

Experience Level

Senior — typically multiple years of experience in DRAM design and memory subsystem architecture (preferred ~6+ years of relevant experience).

Responsibilities

Accountable for circuit and layout leadership across the memory design flow and for cross-functional coordination to ensure manufacturable designs.

• Design digital, analog, and memory-core circuits using CMOS logic and transistors from concept through implementation.
• Create and optimize floorplans for placement, routing, power delivery, sense margins, array timing, and die size; lead layout activities.
• Perform circuit simulations and analysis using FINESIM, HSPICE, and Verilog; evaluate power, performance, reliability, and parasitic impacts.
• Validate builds via reticle experiments and tape-out revisions; perform simulation-to-silicon correlation and identify required schematic/layout edits.
• Maintain design documentation, contribute to departmental best practices, and train peers.
• Coordinate with verification, product engineering, test, probe, process integration, assembly, and marketing to ensure manufacturability and quality.
• Manage project tasks, serve as primary contact for design/layout/verification/test issues, and lead design reviews and status reporting.

Requirements

Must-have technical skills and experience required to perform the role.

• Proven experience designing DRAM circuits and familiarity with DRAM subsystem architecture, specification, and operation.
• Proficiency with Cadence Virtuoso for schematic and layout work.
• Hands-on simulation experience with FINESIM, HSPICE, and Verilog.
• Experience creating and optimizing floorplans for placement, routing, power, timing, and die-size tradeoffs.
• Demonstrated ability to perform simulation-to-silicon correlation and drive schematic/layout revisions after silicon validation.
• Strong analytical and problem-solving skills with a record of significant technical contributions and leadership across engineering teams.
• Ability to collaborate proactively across design, verification, test, process integration, and manufacturing to optimize quality, cost, reliability, and time-to-market.
• Nice-to-have: familiarity with AI-enabled tools for schematic/layout assistance; deep knowledge of industry technologies and competitive trends; strong communication skills.

Education Requirements

BS or MS in Electrical Engineering or a related technical field is preferred. Relevant coursework includes CMOS circuit design, VLSI, and analog circuit design. Preferred candidates have ~6+ years of experience in DRAM design, product, or system work.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.