Principal Layout Engineer

Job Title

Principal Layout Engineer

Role Summary

Lead the analog/layout team responsible for physical design of analog blocks and mixed-signal subsystems for microcontrollers and RF-connected products. The role coordinates with analog design, digital layout, verification and subsystem teams to deliver manufacturable layout, sign-off, and physical models for integration.

Experience Level

Senior — expects an experienced engineer and leader (posting indicates ~10 years of relevant experience).

Responsibilities

Primary responsibilities include technical leadership, hands-on layout work, and cross-functional delivery for analog/RF physical design.

• Lead and mentor a team of analog layout engineers and develop team expertise.
• Perform and review layout of analog and RF components for MCU, NFC, UWB and BT/BLE products.
• Work across multiple process nodes and foundries (examples listed: 140nm to 16nm, CMOS, BCD, FD-SOI, FinFET).
• Provide accurate estimates for area, performance and schedule; drive teams to meet aggressive timelines without sacrificing quality.
• Collaborate with analog design engineers to ensure layout-design integration and meet performance, power, and area targets.
• Develop and maintain layout scripts and automation tools; deliver physical models (LEF, libraries) for subsystem integration.
• Perform layout verification (DRC, LVS) and sign-off activities.

Requirements

Must-have qualifications and key skills. Nice-to-have items are noted when appropriate.

• Must-have: ~10 years' experience in layout of analog blocks and systems, with proven delivery of working silicon for high-volume products.
• Must-have: Experience leading global engineering teams and coordinating across functions.
• Must-have: Strong transistor-level analog IC fundamentals, device physics, layout matching and parasitics knowledge, and practical debugging skills.
• Must-have: Proficiency with analog layout and verification tools (examples: Cadence Virtuoso, Siemens Calibre).
• Must-have: Experience with ESD and latch-up considerations and with signal-chain and power-design layouts.
• Must-have: Hands-on experience with DRC/LVS sign-off and providing physical models (LEF, libs) to integration teams.
• Nice-to-have: Experience across a range of process technologies and foundries (FD-SOI, FinFET, BCD) and RF/connected product domains (NFC, UWB, BT/BLE).

Education Requirements

M.S. or B.S. in Electrical Engineering (MSEE/BSEE) or equivalent practical experience.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.