Principal, IO Design Engineering

Job Title

Principal, IO Design Engineering

Role Summary

The Principal IO/Clocking Design Engineer is responsible for development, optimization, verification, and transfer of high-speed IO and clocking circuits used across Micron DRAM products.

This individual will work on circuit-level techniques (equalization, bandwidth extension), analyze IO impairments and timing impacts, and collaborate with product engineering, signal integrity, process integration, and transistor modeling teams to achieve silicon targets.

Experience Level

Senior — position requires substantial industry experience. Posting specifies MSEE + 10 years or BSEE + 12 years in analog and mixed-signal circuit design.

Responsibilities

Key responsibilities include design, verification, and cross-team collaboration to deliver high-speed IO and clocking circuits for DRAM products.

• Innovate, design, optimize and verify high-speed IO and clocking circuits for DRAM products.
• Apply and extend high-speed circuit design techniques; evaluate IO data-path and clocking path performance at circuit level.
• Develop accurate modeling, analysis, and simulation methodologies to capture circuit performance and impact on full-chip/system specifications.
• Analyze IO impairments, clock jitter, and duty-cycle error and their effect on system timing budgets.
• Work with Product Engineering and SI teams to compare silicon performance with simulations and support correlation and validation activities.
• Collaborate with process integration and transistor modeling teams on next-node process readiness and supervise layout to minimize parasitics.
• Support multiple product teams (commodity, mobile, graphics) in parallel during silicon validation.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Proficiency with UNIX and Cadence design environment (simulation, schematic entry, SPF extraction).
• Understanding of device physics and CMOS processing techniques.
• Ability to supervise layout work and apply high-speed layout best practices to minimize parasitic impacts.
• Strong verbal and written communication skills; able to convey complex technical concepts to peers.
• Mental agility and ability to coordinate with multiple concurrent product teams and silicon validation efforts.

Preferred:

• Experience in high-speed transmitter, receiver and clocking circuit design with proven silicon successes.
• Experience in channel modeling, transceiver noise and timing budget analysis, equalization techniques, and signal integrity.
• Demonstrated ability to mentor and coach early-career engineers.
• Experience using AI/ML techniques and fluency in scripting languages such as Perl or Python.

Education Requirements

Minimum: MSEE plus 10 years industry experience, or BSEE plus 12 years industry experience in analog and mixed-signal circuit design. Fields implied: Electrical/Electronics Engineering or closely related technical discipline. No specific certifications listed.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.