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Principal FPGA Digital Design Engineer

BAE Systems
October 20, 2026
Full-time
On-site
Nashua, New Hampshire, United States
$118,095 - $200,762 USD yearly
FPGA Programming Jobs, Level - Senior

Job Title

Principal FPGA Digital Design Engineer

Role Summary

Senior FPGA digital design engineer in the Countermeasure & Electromagnetic Attack Solutions (CEMA) Hardware Engineering Group. Lead and execute FPGA designs through architecture, RTL implementation, synthesis, place-and-route, timing closure, verification support, and lab bring-up for defense electronics systems.

Experience Level

Senior - typically 6+ years of relevant experience with a bachelor’s degree (fewer years required with an advanced degree). Requires ability to obtain or possess a U.S. Secret security clearance and U.S. citizenship.

Responsibilities

Accountabilities include hands-on FPGA design and verification, delivering production-ready firmware, and supporting lab and field integration.

  • Lead architecture and RTL implementation for FPGA designs.
  • Perform synthesis, place-and-route, static timing analysis, and timing closure.
  • Develop basic testbenches and run digital simulation (Modelsim/Questa).
  • Support lab bring-up, debugging, and product support using internal logic analyzers.
  • Implement and review clock-domain crossing and high-speed interface designs (SERDES, PCIe, DDR2/3/4, LVDS).
  • Ensure FPGA security and support production integration and sustainment.
  • Mentor junior engineers and collaborate across hardware, firmware, and systems teams.

Requirements

Must-have technical skills, clearance, and work authorization.

  • Current Secret security clearance or ability to obtain one.
  • U.S. citizenship required.
  • Proven FPGA/ASIC design experience (toolflow and practical implementation).
  • VHDL (preferred) or Verilog HDL coding experience.
  • Familiarity with Xilinx Vivado or Intel/Altera Quartus toolchains.
  • Experience with internal logic analyzers (ILA/Chipscope/SignalTap) and digital simulation (Modelsim/Questa).
  • Hands-on static timing analysis, timing closure, and clock-domain crossing techniques.
  • Experience with high-speed interfaces (SERDES, PCIe, DDR2/3/4, LVDS).
  • Revision control experience (GIT, CVS, ClearCase, Subversion, etc.) and scripting (Perl, Tcl, Python, shell).
  • Strong debugging, lab testing, written and oral communication skills; self-starter and team player.

Nice-to-have:

  • DSP fundamentals and FPGA implementation experience.
  • Matlab/Simulink, SoC design experience, low-latency design.
  • UVM/SystemVerilog, working knowledge of radar, video/EOIR processing, data communications (Ethernet MAC/PHY), stepper motor control, and C/C++.

Education Requirements

Bachelor's degree required (6+ years experience expected); fewer years are acceptable with an advanced degree (e.g., Master's). No specific field of study is listed in the posting.


About the Company

Company: BAE Systems

Headquarters: London, United Kingdom

Global defense, aerospace and security company delivering products and services for air, land and naval forces, advanced electronics, cyber and intelligence solutions, and space and mission systems for government and commercial customers.

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Date Posted: 2026-10-14