Principal FPGA/ASIC Verification Engineer (Onsite)

Job Title

Principal FPGA/ASIC Verification Engineer (Onsite)

Role Summary

Lead design and verification of testbenches for high-performance digital ASICs and FPGAs supporting mission systems. Work within the Microelectronics Technology team to define verification architecture, implement test plans, and mentor engineers on verification practices.

Onsite role based in Fort Wayne, IN, working on signal processing and information-assurance-related ASIC/FPGA projects for defense customers.

Experience Level

Level: Senior. Typical experience: 8+ years relevant engineering experience, or 5+ years with an advanced degree. Specific verification/RTL experience expectations noted below.

Responsibilities

Primary responsibilities include architecture and implementation of verification environments and technical leadership for verification teams.

• Design and implement verification environments using SystemVerilog with OVM/UVM.
• Create written test plans, test cases, and maintain code and functional coverage metrics.
• Develop testbenches for RTL blocks using VHDL and/or SystemVerilog; simulate and run verification flows.
• Apply chip-level verification methodologies: constrained-random testing, functional coverage, assertion-based verification.
• Recommend and adopt tools and practices to improve ASIC/FPGA verification flow.
• Provide technical leadership: break down work, plan activities, estimate effort, and report status.
• Contribute to engineering estimates for program pursuits and support lab validation and debug as needed.

Requirements

Must-have technical skills, security and experience prerequisites; preferred skills listed separately.

• Active, transferable U.S. government security clearance (DoD Secret) required prior to start; U.S. citizenship required.
• Professional experience developing and simulating RTL with VHDL and/or Verilog/SystemVerilog; proven ability to implement verification testbenches.
• 4+ years applying chip-level verification methodologies (constrained-random, functional coverage, assertions) and using SystemVerilog for verification.
• Experience leading or mentoring engineers and working independently in team settings.
• Familiarity with revision control systems (Git or Subversion) for source and configuration management.

Nice-to-have:

• ASIC/FPGA lab validation and debug experience and familiarity with DFT, manufacturability, and production test concepts.
• Proficiency with Unix/Linux and scripting or software development (C, C++, Python, Perl, shell).
• Experience with industry tools such as QuestaSim, Synplify, Quartus, or Vivado.
• Strong written and verbal communication skills in multidisciplinary engineering environments.

Education Requirements

Typically requires a Bachelor’s degree in a STEM field (Science, Technology, Engineering, Mathematics) with ~8+ years of relevant experience, or an advanced degree in a related field with ~5+ years of experience. Fields cited include Electrical or Computer Engineering and related technical disciplines. Equivalent practical experience may be considered.

About the Company

Company: Raytheon Technologies

Headquarters: Arlington, VA, USA

Raytheon Technologies is an Aerospace and Defense company offering advanced systems and services for commercial, military, and government customers worldwide. Formed in 2020 from the merger of Raytheon Company and United Technologies Corporation, it operates through three major business units: Collins Aerospace Systems, Pratt & Whitney, and Raytheon. The company specializes in delivering cutting-edge solutions across various fields including quantum physics, hypersonics, and cybersecurity.