Principal Engineer - Subsystem CoE Emulation

Job Title

Principal Engineer - Subsystem CoE Emulation

Role Summary

Lead development and deployment of emulation infrastructure and models for complex SoC subsystems within the Emulation Center of Excellence (CoE) in the Custom Compute and Storage business unit. The role focuses on enabling pre-silicon validation, firmware readiness, and system-level debug across multiple teams and customers.

Work spans emulation model development, environment bring-up, test-plan execution, performance optimization, and cross-functional debugging on industry emulation platforms.

Experience Level

Senior — typically 12+ years of related professional experience; 10+ years of experience acceptable with a Master’s degree or PhD.

Responsibilities

The role is responsible for end-to-end emulation activities for SoC subsystems and for enabling firmware and software validation using emulation platforms.

• Lead development of complex SoC emulation models, integration, environment setup, compilation, and debug on platforms such as Veloce, ZeBu, and Palladium.
• Drive emulation bring-up activities including clock/reset sequencing, firmware boot, and system validation using pre-silicon hardware models.
• Create and execute emulation test plans supporting verification, performance analysis, software development, and system validation.
• Collaborate with RTL design, verification, and firmware teams to define requirements and ensure model accuracy and integration.
• Debug complex SoC and subsystem issues across RTL, firmware, emulation platforms, and toolchain interactions.
• Optimize emulation performance through model partitioning, timing adjustments, and runtime efficiency tuning.
• Automate flows and improve productivity through scripting and tooling enhancements.
• Work with EDA vendors to evaluate tools, resolve technical issues, and influence feature improvements.

Requirements

Must-have technical skills and experience. Education degree requirements are listed separately under Education Requirements.

• Strong hands-on experience in SoC emulation, validation, and debug.
• Experience with emulation platforms such as Palladium, ZeBu, and Veloce.
• Deep understanding of SoC architecture, interconnects, and system-level integration.
• Proven debugging skills across the hardware/software boundary.
• Proficiency in scripting and automation (Python, Perl, Tcl, Shell).
• Expertise in one or more domains: boot flow and system initialization, security architecture and validation, high-speed protocols (PCIe, CXL, Ethernet), memory interfaces (DDR, HBM), and peripheral interfaces (SPI, I2C, UART, USB 3.0).
• Proven ability to lead cross-functional efforts and drive execution.

Education Requirements

Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 12+ years of related professional experience; alternatively, Master’s degree or PhD in Computer Science, Electrical Engineering, or related fields with 10+ years of experience. (Degrees and fields explicitly listed in the source.)

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.