Principal Engineer, R&D Engineering (Analog/Mixed-Signal — High-Bandwidth Memory Interfaces)
Design and develop analog and mixed-signal circuits for high-bandwidth memory and die-to-die interconnect IP. Join the Boxborough R&D design team to own silicon-to-simulation correlation, collaborate with layout teams and customers, and mentor junior engineers.
Work involves tapeouts, silicon debug, and improving design predictability across 2.5D/3D multi-chip systems.
Senior — typically 10+ years of hands-on analog/mixed-signal or memory interface circuit design experience with production tapeouts.
Key responsibilities include circuit design, cross-team collaboration, customer support, silicon correlation, mentoring, and automation.
Must-have technical skills and experience for success in this role.
Bachelor's, Master's, or PhD in Electrical Engineering or a closely related technical field (posting specifies BS, MS, or PhD in Electrical Engineering or something closely related).
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
