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Principal Engineer, Project Management - Chip Design

NVIDIA
August 11, 2026
Full-time
On-site
Tel Aviv, Israel
ASIC Design Jobs, Level - Senior

Job Title

Principal Engineer, Project Management - Chip Design

Role Summary

Technical lead and project manager for pre‑silicon and post‑silicon development of next‑generation switch ASICs. Responsible for driving projects from concept and architecture through tape‑out, chip bring‑up, validation, and mass production.

Work with cross‑disciplinary teams including unit ASIC, physical design, CAD, package, firmware/software, DFT, system and analog teams to deliver complex SoC projects on schedule and with high quality.

Experience Level

Senior — typically requires 15+ years of chip design experience and 8+ years in chip design/verification management.

Responsibilities

Accountable for technical program delivery across the ASIC lifecycle. Key responsibilities include:

  • Lead ASIC development from concept and architecture through micro‑architecture, RTL, verification, and physical design to tape‑out.
  • Manage post‑silicon activities: chip power‑on, bring‑up, validation, quality phases, and transition to mass production.
  • Define and implement execution plans with cross‑discipline leaders (unit level, full‑chip, physical design, firmware/software/emulation).
  • Coordinate roadmaps and technical priorities for switch ASIC projects.
  • Collaborate with unit ASIC, physical design, CAD, package, firmware/software, DFT, system, analog, and other teams to resolve cross‑domain issues.
  • Lead, mentor, and manage engineering teams; set milestones, track progress, identify risks, and drive mitigation.
  • Report status and technical tradeoffs to stakeholders and drive decisions to meet schedule and quality targets.

Requirements

Must‑have technical and leadership capabilities required for the role:

  • 15+ years of proven experience in chip design (system/SoC level).
  • 8+ years of experience in chip design/verification management, including leading teams with at least 8 direct reports.
  • Proficiency in RTL design (Verilog), verification methodologies (UVM, SystemVerilog), SoC design/integration flows, and design automation tools.
  • High system‑level view and demonstrated ability to collaborate across multiple engineering functions.
  • Strong analytical and problem‑solving skills, with excellent communication and teamwork abilities.
  • Ability to define execution plans, track metrics, and drive projects to completion.

Nice‑to‑have:

  • Experience with synthesis and physical design.

Education Requirements

BS or MS in Computer Engineering or Electrical Engineering, or equivalent practical experience.


About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

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Date Posted: 2026-08-10