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Principal Engineer - Physical Design

Microchip
May 19, 2026
Full-time
On-site
Chandler, Arizona, United States
Physical Design Jobs, Level - Senior

Job Title

Principal Engineer - Physical Design

Role Summary

Join Microchip's CAD Physical Design team to lead full-chip APR and physical implementation from netlist to GDSII. The role focuses on delivery of hierarchical, low-power, multi-mode, multi-corner mixed-signal designs and driving sign-off-quality physical implementation across a global design team.

Experience Level

Senior β€” typically requires 10+ years of relevant physical design experience.

Responsibilities

Primary responsibilities center on end-to-end full-chip physical implementation and collaboration with cross-functional teams to achieve design closure.

  • Lead full-chip APR/physical implementation (netlist-to-GDSII) activities.
  • Perform floorplanning, placement optimization, clock tree synthesis, routing, and crosstalk avoidance for complex designs.
  • Implement physical design for hierarchical, low-power, multi-mode, multi-corner mixed-signal designs.
  • Drive timing closure and sign-off flow execution across STA, formal equivalence, parasitic extraction, power integrity, and physical verification.
  • Apply and verify UPF and low-power design practices throughout the physical design flow.
  • Develop and maintain automation and scripts to improve PD flows.
  • Collaborate with geographically distributed teams and provide technical leadership to achieve design goals.
  • Participate in design reviews and provide guidance on implementation risks and mitigations.
  • Travel as needed (0%–25%).

Requirements

Key required skills, tools, and experience.

  • Hands-on experience across physical design flows, including placement, routing, CTS, and physical verification.
  • Advanced knowledge of place-and-route methodologies, VLSI timing principles, clock structures, and timing closure techniques.
  • Experience with sign-off tools for static timing analysis, formal equivalence, parasitic extraction, power integrity, and physical verification.
  • Practical experience with UPF and low-power design implementation in physical flows.
  • Daily use of ICC/ICC2 or Cadence Innovus preferred.
  • Experience with 40nm or 28nm technologies required; 16nm or smaller preferred.
  • Proficiency in Tcl and Perl scripting for CAD flow automation.
  • Strong written and verbal communication, problem-solving, and teamwork skills.

Education Requirements

Bachelor's or Master's degree in Electrical or Electronics Engineering required (mentioned with the role's experience requirement of 10+ years).


About the Company

Company: Microchip

Headquarters: Chandler, Arizona, USA

Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.

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Date Posted: 2026-05-19