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Principal Engineer, Mixed Signal Design Engineering

Analog Devices
October 2, 2026
Full-time
On-site
Chandler, Arizona, United States
Device Engineering Jobs, Level - Senior

Job Title

Principal Engineer, Mixed Signal Design Engineering

Role Summary

Serve as the technical authority for architecture and design of high-resolution analog-to-digital and digital-to-analog converter ICs. Lead end-to-end development from specification through silicon validation to production release, driving system-level performance across linearity, noise, and dynamic range.

Experience Level

Senior - principal-level engineering role. Typically requires 8–10+ years of relevant precision data converter IC design experience and demonstrated technical leadership on multiple programs.

Responsibilities

Lead architecture, design, and delivery of precision data converters, working across mixed-signal, process, and systems teams.

  • Define system-level architecture for ADC, DAC, reference, and signal-conditioning subsystems.
  • Architect high-resolution ADC topologies (SAR, delta-sigma, pipeline) and optimize for linearity, noise floor, power, and area.
  • Design precision DAC circuits (current-steering, R-2R, segmented) and verify accuracy across operating conditions.
  • Drive calibration and trimming strategies for offset, gain, and linearity across temperature and supply variation.
  • Lead architecture and design reviews; evaluate trade-offs across resolution, speed, power, and area.
  • Own noise budgeting and signal-integrity analysis from analog front-end through digital back-end.
  • Guide design-for-manufacturing and yield optimization using Monte Carlo and statistical centering techniques.
  • Partner with applications, product, and systems engineering to translate measurement requirements into converter specifications and influence product roadmaps.

Requirements

Must-have technical skills and proven track record (degree details are listed in Education Requirements below).

  • Proven expertise in ADC architectures (SAR, delta-sigma, pipeline) with demonstrated silicon results.
  • Practical experience with DAC architectures: current-steering, R-2R, segmented, or charge-redistribution topologies.
  • Deep understanding of precision performance metrics (INL, DNL, SFDR, SNR, ENOB, THD, offset/gain drift).
  • Track record of leading converter designs from concept through tape-out, silicon validation, and production release.
  • Strong knowledge of CMOS process technology, device matching, noise mechanisms (thermal, flicker, quantization), and layout-dependent effects.
  • Proficiency with Cadence IC design tools such as Virtuoso, Spectre/APS, and AMS Designer.
  • Excellent presentation, technical writing, and communication skills.
  • Willingness to travel (~10%) for cross-site collaboration and validation activities.

Preferred:

  • Experience with digitally-assisted calibration (background calibration, digital error correction, redundancy-based algorithms).
  • Familiarity with high-speed converter techniques including interleaving and time-interleaved ADC architectures.
  • Switched-capacitor circuit design and bootstrapped sampling experience.
  • Knowledge of digital interface protocols (SPI, LVDS, JESD204B/C) and oversampling/noise-shaping techniques.

Education Requirements

MSEE (with ~10+ years relevant experience) or PhD (with ~8+ years relevant experience); BSEE considered with equivalent depth. Fields: Electrical Engineering or related technical disciplines. (Degree/field expectations taken from the posting.)


About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.

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Date Posted: 2026-09-30