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Principal Engineer - HIG HBM Layout

Micron Technology
May 07, 2026
Full-time
On-site
Hyderabad, Telangana, India
Physical Design Jobs, Level - Senior

Job Title

Principal Engineer - HIG HBM Layout

Role Summary

The Principal Engineer will lead layout design efforts for High Bandwidth Memory (HBM) products on the HIG HBM team in Hyderabad, India. The role focuses on designing complex analog/mixed-signal and custom IC layouts to meet performance, power, area, and tape-out requirements for high-performance computing and AI applications.

This position is a technical and people-lead role: you will grow and manage a layout team, define specifications, coordinate multi-site projects, and represent the team in industry standards activities.

Experience Level

Senior — requires extensive experience. The posting specifies 15+ years in analog/custom layout and a minimum of 4+ years developing and leading teams and projects.

Responsibilities

Primary responsibilities include hands-on layout leadership, project delivery, and collaboration across design and customer teams.

  • Lead establishment and growth of an analog/mixed-signal layout team to meet global HBM requirements.
  • Perform and review die design, floorplanning, manual routing, and detailed IC layout for high-speed interfaces and mixed-signal circuits.
  • Define and communicate layout specifications within the design team and to external customers.
  • Drive architecture analysis and optimization for performance, power, and area.
  • Manage multiple layout projects and tape-outs, including task organization, resource allocation, and logistics.
  • Participate in industry standards committees and represent the company on technical matters.
  • Provide customer support to help integrate and implement Micron’s products.
  • Hire, mentor, and manage team performance, development, and retention.

Requirements

Must-have technical skills and experience; concise summary of required qualifications.

  • 15+ years of hands-on analog/custom IC layout experience in advanced CMOS processes.
  • Minimum 4+ years of experience developing and leading teams and projects.
  • Proven experience leading multiple projects and successful tape-outs.
  • Expertise with Cadence VLE/VXL and Calibre DRC/LVS.
  • Strong floorplanning, layout, and manual routing skills for analog/mixed-signal designs.
  • Experience running multiple custom IC layout projects concurrently.
  • Excellent verbal and written communication; capable of working across multi-functional, multi-site teams and time zones.

Education Requirements

Bachelor's (BE) or Master's (MTech) in Electronics or VLSI Engineering is specified.


About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.

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Date Posted: 2026-05-07