Principal Engineer - HIG HBM Layout

Job Title

Principal Engineer - HIG HBM Layout

Role Summary

Principal Engineer on the HIG HBM team in Hyderabad responsible for lead IC layout design and team leadership for High Bandwidth Memory (HBM) products used in AI and HPC applications. The role focuses on advanced analog/custom layout, die design, floorplanning, manual routing, and delivery of tape-outs.

The position leads a layout team to meet global HBM requirements, collaborates across multi-site engineering teams, and represents the company in industry activities.

Experience Level

Senior — typically 15+ years of experience in analog/custom layout with a minimum of 4+ years in team leadership and project management.

Responsibilities

Key responsibilities include hands-on layout work, team leadership, project delivery, and cross-functional collaboration.

• Design and develop complex IC die layouts for HBM products, focusing on performance, power, and area (PPA) optimization.
• Lead establishment, growth, and technical direction of an analog/mixed-signal layout team to meet global HBM requirements.
• Plan floorplanning, manual routing, and implementation details for multiple concurrent custom IC projects.
• Drive tape-out activities and coordinate deliverables across design, verification, and back-end teams.
• Provide technical leadership in high-speed interfaces, mixed-signal layout, and off-chip signaling considerations.
• Develop and maintain documentation, specifications, and handoffs for internal teams and external customers.
• Represent the company in industry standards committees and stay current with industry developments.
• Manage project logistics: task organization, resource allocation, schedules, and milestones.
• Mentor, hire, and retain team members; manage team performance and professional development.
• Support customers and cross-site teams in multi-timezone collaboration.

Requirements

Must-have technical skills and experience; concise list of essential and desirable qualifications.

• Must-have: 15+ years of experience in analog/custom layout in advanced CMOS processes.
• Must-have: Minimum 4+ years building and leading teams and managing multi-project delivery.
• Must-have: Experience leading multiple projects and successful tape-outs.
• Must-have: Expertise with Cadence VLE/VXL and Calibre DRC/LVS tools.
• Must-have: Strong floorplanning, manual routing, and layout implementation skills.
• Must-have: Proven ability to run multiple custom IC layout projects simultaneously.
• Must-have: Excellent verbal and written communication; ability to work across multifunctional, multi-site teams and time zones.
• Nice-to-have: Deep experience with high-speed interface design, mixed-signal layout optimizations, and off-chip signaling.
• Nice-to-have: Prior participation in industry standards committees and experience supporting external customers.

Education Requirements

BE or MTech in Electronic Engineering or VLSI Engineering.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.