Principal Engineer - Design Engineering
MicrochipJob Title
Principal Engineer - Design Engineering
Role Summary
The Principal Engineer will design and implement digital integrated circuits for communication semiconductor devices at block or top level, collaborating with architects, subsystem leads and verification teams. The role sits in the Communications Business Unit Product Development team focused on networking, connectivity, and edge compute devices.
Primary mission: deliver RTL and synthesized designs that meet timing, power, area and testability targets, and support products through specification to production.
Experience Level
Level: Senior. Guidance: typically 8+ years of relevant industry experience.
Responsibilities
Key responsibilities include:
- Contribute to microarchitecture and block/top-level digital design in partnership with device architects and team leads.
- Write SystemVerilog/Verilog or VHDL RTL implementing low-power design principles.
- Synthesize RTL into gate-level netlists using industry tool flows.
- Provide floor-planning guidance and support to physical design/layout teams.
- Integrate digital and analog with DFT features and support testability sign-off.
- Perform static timing analysis and verify timing closure across design corners.
- Support product lifecycle from specification through production with cross-functional teams (Physical Design, Validation, Firmware, Product and Production Engineering).
- Develop and share technical expertise to improve team capabilities and processes.
Requirements
Must-have technical skills and experience:
- 8+ years of relevant ASIC/SoC digital design experience.
- Hands-on RTL development in SystemVerilog, Verilog, or VHDL.
- Experience with logic synthesis, lint, CDC, formal verification, and static timing analysis (STA).
- Understanding of physical-design interactions: timing, power, and congestion trade-offs.
- Knowledge of DFT practices including scan and testability considerations and sign-off interactions.
- Proficiency with scripting languages such as Tcl, Perl, Python, Awk; familiarity with C/C++ and XML is useful.
- Strong analytical and debugging skills and effective verbal/written communication in English.
- Willingness to travel up to 25% as required.
Nice-to-have:
- Experience with Synopsys or Cadence synthesis/verification/STA tool flows.
- Experience with 28nm and smaller process technologies.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.
About the Company
Company: Microchip
Headquarters: Chandler, Arizona, USA
Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.
