Principal Engineer - CAD, SoC Floorplan and Advanced Technode

Job Title

Principal Engineer - CAD, SoC Floorplan and Advanced Technode

Role Summary

The Principal Engineer will drive floor‑planning, power‑delivery (PDN) methodologies, and technology‑node‑aware implementation flows for advanced SoC and multi‑die systems. This is a hands‑on technical role on the Solutions Engineering CAD team collaborating with architecture, RTL, IP, physical design, packaging/board, foundry, and EDA partners.

Focus areas include scalable automation for top‑level floorplan and PDN, power integrity and thermal‑aware implementation, and PPA optimization across advanced process nodes.

Experience Level

Senior — principal/lead level (typical expectation: 7+ years of relevant SoC/physical design experience).

Responsibilities

Deliver tool flows, methodology, and automation for advanced SoC and multi‑die implementations.

• Develop and drive advanced floor‑planning methodologies for hierarchical and multi‑die designs.
• Define and optimize PDN implementation including IR/EM‑aware planning and power integrity optimization.
• Build scalable automation for top‑level floor‑planning, power mesh/clocking, IO/IP integration, and routing‑congestion analysis.
• Integrate thermal‑aware implementation and PPA optimization into design flows.
• Collaborate with architecture, RTL, physical design, package/board teams, foundries, and EDA partners to enable robust implementation strategies.
• Drive methodology innovation for advanced nodes, ultra‑low voltage designs, and chiplet/multi‑die systems.

Requirements

Must-have technical skills and experience for the role:

• Proven expertise in SoC design flow automation for hierarchical floor‑planning, PDN design, and advanced physical implementation methodologies.
• Strong programming and scripting skills (Python, C) and experience with version control (Git) and distributed processing/debug environments.
• Hands‑on experience with low‑power methodologies, UPF‑based design flows, chip finishing, and physical verification on advanced process technologies.
• Experience with power integrity (IR/EM) analysis and PDN planning for advanced nodes.
• Excellent problem‑solving, communication, and collaboration skills; experience leading technical initiatives across distributed teams.
• Experience working with foundries and EDA ecosystem partners to deploy methodology and tool flow solutions.

Nice-to-have:

• Deep knowledge of advanced clocking structures and power delivery optimization techniques.
• Familiarity with physical verification convergence techniques and AI‑assisted design automation.

Education Requirements

Not specified.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.