Principal Engineer, ASIC Verification - AI/HPC

Job Title

Principal Engineer, ASIC Verification - AI/HPC

Role Summary

Lead the design and implementation of functional verification architecture and environments for advanced AI/HPC multi-core SoCs within the Custom Silicon Engineering team of Data Center Engineering. Work closely with designers and customers to define verification strategy, develop verification infrastructure and reference models, and deliver reliable silicon.

Experience Level

Senior level. Guidance in the posting indicates roughly 10+ years of verification and firmware/software development experience (role expectation).

Responsibilities

The role focuses on defining verification methodology and building scalable test environments and tools for complex multi-core SoCs.

• Design verification environment architecture, including reference models, bus-functional monitors, and drivers.
• Write verification test plans using random techniques and coverage-driven methods; work with designers to close coverage gaps.
• Develop tests, tune the environment to meet coverage goals, and debug failures with cross-functional teams.
• Verify boot code and validate system-level firmware interactions.
• Architect, develop, and maintain software tools to streamline verification and support highly parallel compute environments.
• Transform engineering requirements into easy-to-use, scalable tools; perform unit and regression testing of those tools.
• Contribute to and evolve verification methodology and best practices.

Requirements

Must-have technical skills, tools, and attributes for successful performance in the role.

• Strong experience with SystemVerilog and UVM.
• Proven experience building detailed test plans and sophisticated directed/random verification environments.
• Proficiency with scripting languages such as Python or Perl and familiarity with EDA verification tools.
• Object-oriented design and implementation experience.
• Good understanding of Linux operating systems.
• Good programming skills; C++ and ARM assembly experience desired.
• Familiarity with networking protocols is a plus.
• Ability to work independently, pay attention to detail, take initiative, and collaborate across differing opinions.
• May require eligibility to access export-controlled information under applicable U.S. export control laws; candidate may be subject to export license review.

Education Requirements

BS in Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of verification and firmware/software development experience; or MS/PhD with 5+ years of relevant experience.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.