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Principal Engineer, Analog IC Design

Marvell Technology
May 14, 2026
Full-time
On-site
Santa Clara, California, United States
Semiconductor IP Jobs, Level - Senior

Job Title

Principal Engineer, Analog IC Design

Role Summary

Lead analog IC architecture and design for high-performance circuits including PLLs, data converters, oscillators, and high-speed SerDes. Work within the analog/mixed-signal design team to define specifications, verify designs at the system level, supervise layout in advanced process nodes, and support silicon bring-up and lab debugging.

This role involves project leadership, cross-functional coordination, and maintaining design documentation for production-quality semiconductor IP and products.

Experience Level

Senior (Principal level). Guidance: 6+ years of experience in analog circuit design.

Responsibilities

Primary responsibilities include technical leadership across the analog design flow and delivery of silicon-ready designs.

  • Design and architect high-performance analog circuits (PLLs, data converters, oscillators, high-speed SerDes).
  • Lead projects, manage design schedules, and coordinate cross-functional verification and tape-out activities.
  • Produce circuit design specifications and perform system-level verification.
  • Supervise analog layout activities in advanced process nodes (FinFET) and ensure layout-design parity.
  • Support silicon bring-up, lab debugging, and characterization.
  • Maintain engineering documentation and facilitate team communication and handoffs.
  • Mentor junior engineers and provide technical management as required.

Requirements

Must-have technical skills and practical experience; technical management is a plus.

  • Proven analog circuit design experience with PLLs, data converters, oscillators, and high-speed SerDes.
  • Proficiency with analog design and verification tools such as Cadence Virtuoso, Spectre, and ADE.
  • Knowledge of signal integrity, noise reduction techniques, and low-jitter clock generation.
  • Experience with analog layout considerations in FinFET technologies for high-speed designs.
  • Experience in system-level pre-tapeout analog validation, silicon bring-up, and lab chip debugging.
  • Strong technical communication and documentation skills.
  • Technical/people management experience is desirable.

Education Requirements

Master's degree or PhD in Electrical Engineering or a related field (as listed in the posting).


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-05-13