Principal Engineer - Analog Design (SERDES)

Job Title

Principal Engineer - Analog Design (SERDES)

Role Summary

Senior analog/mixed-signal design role focused on architecting and delivering Multi-Gbps SERDES IP for data center, automotive, and AI applications. The role combines hands-on circuit design, architecture definition, and post-silicon debug with leadership and mentoring responsibilities.

You will lead analog block design and analog/digital co-design efforts, work with layout and verification teams, and influence product roadmaps and customer engagements for high-speed connectivity IP.

Experience Level

Senior. Typical background: MTech/MS with 8+ years or BTech/BS with 10+ years of hands-on analog IC design experience in high-speed SERDES and FinFET technologies.

Responsibilities

Technical and leadership responsibilities:

• Translate high-speed standards (PCIe, Ethernet, USB, CXL) into transceiver architectures and block-level specifications for NRZ and PAM4 designs.
• Architect and design analog/mixed-signal circuits (TX drivers, RX front-ends, adaptive equalizers, PLLs/DLLs, bandgaps, regulators, oscillators, ADC/DACs) for advanced FinFET/GAA nodes.
• Collaborate with digital teams on calibration, adaptation algorithms, and timing handoff to ensure integration and performance.
• Work with layout engineers to minimize parasitics, manage device stress and process variation, and ensure robust post-silicon behavior.
• Present simulation results, trade-offs, and architectural decisions in internal reviews and customer meetings.
• Prepare design documentation, test plans, and support post-silicon bring-up, debug, and design iterations.
• Analyze customer silicon and field data to drive improvements and next-generation IP updates.

Requirements

Must-have technical skills and experience; items marked as nice-to-have when applicable.

• Proven CMOS tape-outs in FinFET technologies with demonstrated Multi-Gbps high-speed design experience (NRZ and PAM4).
• Deep expertise in SERDES sub-circuits: TX drivers, RX front-ends, adaptive equalizers, PLLs/DLLs, bandgaps, regulators, oscillators, and data converters.
• Strong analog/digital co-design experience, including calibration loops and timing handoff.
• Proficiency with schematic entry, layout collaboration, design verification flows, and SPICE simulators (Spectre, HSPICE, or similar).
• Experience with scripting for data post-processing and automation (TCL, Perl, MATLAB, or similar).
• Solid system-level budgeting experience for jitter, amplitude, and noise; familiarity with packaging parasitics, crosstalk, and channel loss.
• Nice-to-have: experience with ESD protection, design-for-reliability (electromigration, IR drop, aging, self-heating), custom digital design, or high-speed interleaved SAR ADCs.

Education Requirements

MTech / MS with 8+ years of relevant analog IC design experience, or BTech / BS with 10+ years. Fields: Electrical Engineering, Computer Engineering, Computer Science or related technical disciplines. (Degrees and years-of-experience guidance as stated in the posting.)

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.