Principal Engineer
Design and implement ASIC solutions using Broadcom's CMOS cell-based technologies for advanced process nodes (5nm/3nm). Work across RTL, synthesis, timing verification, physical implementation and post-prototype validation to deliver production tapeouts.
The role sits on the ASIC design team in Shanghai and requires collaboration with internal and external stakeholders to meet tapeout schedules and technical targets.
Senior-level (Principal). Typical experience: 7+ years in ASIC/VLSI design or equivalent engineering practice.
Deliver design and verification tasks across full-chip and block-level flows.
Key technical and interpersonal requirements. Must-have items are listed first; additional skills are nice-to-have.
Preferred: MS in Microelectronics or a related discipline. (Source indicates MS is preferred; no alternative degree or equivalent-experience language was specified.)
Company: Broadcom
Headquarters: Irvine, California, United States
Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.
