Principal Digital IC Design Engineer

Role Summary

The Principal Digital IC Design Engineer will be part of the Custom Silicon Engineering (CCS) team at Marvell, focusing on architecting and implementing advanced SoC designs. This role involves collaboration with various internal teams and external vendors to influence key project milestones in silicon programs.

Experience Level

Mid-level; 5-15 years of experience in digital IC design required.

Responsibilities

Key responsibilities include:

• Leading micro-architecture and RTL development for compute and connectivity subsystems.
• Driving HW/SW co-design and integration across multi-die SoC platforms.
• Collaborating with architects and DV engineers for functional correctness, timing closure, and power optimization.
• Owning RTL delivery milestones from ASR through PRQ.
• Interfacing with external IP vendors and CAD teams to ensure IP integration and tool flow compatibility.

Requirements

Must-have qualifications include:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 10-15 years experience, or a Master's/PhD with 5-10 years of experience in digital IC design.
• Deep understanding of SoC architecture and high-speed interfaces.
• Expertise in Verilog/VHDL, RTL linting, CDC analysis.
• Proficiency in scripting languages (Python, Perl) for design automation.
• Experience with CXL, PCIe, DDR, and D2D protocols is highly desirable.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field; Master’s or PhD preferred.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.