Principal Digital ASIC Design Engineer

Job Title

Principal Digital ASIC Design Engineer

Role Summary

Design high-performance digital ASICs from RTL through synthesis and drive complex chip architectures in advanced processes. Work on multi-disciplinary teams to deliver tape-outs, physical design, and design-for-test; contribute to proposals and mentor junior engineers. This position is onsite in Cambridge, MA and requires an active U.S. security clearance.

Experience Level

Senior-level. Hiring guidance: 10+ years of relevant experience with a bachelor’s degree, or 5–10 years with a master’s degree.

Responsibilities

Key responsibilities include system- and circuit-level design through physical implementation and team leadership:

• Architect and implement digital ASIC designs (RTL through synthesis).
• Perform transistor-level design and simulation to meet architecture and requirement specifications.
• Optimize hardware for performance, power, and cost.
• Evaluate hardware feasibility of complex algorithms and drive solutions when requirements are unclear.
• Lead floor-planning, physical layout, parasitic simulation, and contribute to DFT development.
• Contribute to business development and proposal activities.
• Document and teach best practices; mentor and guide less-experienced engineers.

Requirements

Must-have technical skills, security, and professional capabilities; nice-to-have items listed separately.

• Proven proficiency in integrated circuit and front-end digital systems design.
• Fluent in SystemVerilog, Verilog, or VHDL; experienced with lint, simulation, and synthesis tools.
• Experience with Cadence or Synopsys front-end design flows.
• Experience with physical implementation, floor-planning, parasitic extraction, and DFT.
• Track record of successful tape-outs at advanced nodes and ability to lead multi-disciplinary teams.
• Strong analytical, written and verbal communication, organizational, and time-management skills.
• Active U.S. security clearance required (must obtain and maintain).
• Nice-to-have: low-power circuit design, CMOS nodes below 32 nm, radiation-hardened electronics, familiarity with secure systems architectures (cryptographic engines, tagged processors).

Education Requirements

Requires a bachelor’s degree in Engineering or a related field; master’s degree preferred. Hiring guidance: 10+ years of relevant experience with a bachelor’s degree, or 5–10 years with a master’s degree. Equivalent practical experience is acceptable.

About the Company

Company: Draper

Headquarters: Cambridge, MA, United States

Draper is an independent, nonprofit research and development organization based in Cambridge, Massachusetts. With over 2,000 employees, Draper develops advanced technologies in defense, space, biomedical engineering, and other national-security and commercial domains through multidisciplinary teams of engineers and scientists.