Job Title
Principal Design Verification Engineer, Secure Root of Trust
Role Summary
Lead verification architect on the Design Verification Team responsible for validating secure, high-performance SoC designs. The role focuses on developing verification environments, reference models, test plans, and tools to verify secure boot and root-of-trust functionality in multi-core SoCs.
Experience Level
Senior level. The posting requests approximately 10–12 years of relevant professional experience.
Responsibilities
Work with design teams to translate requirements into verification plans, implement verification environments, and drive closure of functional and security-related issues.
- Architect and develop functional verification environments, including reference models, bus-functional monitors, and drivers.
- Write detailed verification test plans using constrained-random techniques and coverage analysis.
- Create directed and random tests; tune environments to meet coverage goals and debug failures.
- Verify boot code and root-of-trust related flows, including secure boot and secure debug scenarios.
- Develop and maintain software tools to streamline verification and support large-scale parallel test execution; perform unit and regression testing of those tools.
- Collaborate with firmware and hardware designers to resolve functional and security issues.
Requirements
Must-have technical skills and experience.
- Experience with SystemVerilog and UVM verification methodology.
- Proven experience building sophisticated directed and constrained-random verification environments and writing verification plans.
- Proficiency with scripting languages such as Python or Perl and common EDA verification tools.
- Object-oriented design experience and good programming skills; Linux proficiency.
- Experience verifying complex, security-sensitive SoCs and secure hardware architecture concepts (root of trust, secure boot, secure debug).
- Good debugging skills and ability to collaborate with cross-functional teams.
- Nice-to-have: strong C++ skills and ARM assembly knowledge.
Education Requirements
BS, MS, or PhD in Computer Science, Electrical Engineering, or Computer Engineering, or equivalent practical experience. The posting specifies ~10–12 years of relevant professional experience.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Date Posted: 2026-07-04