Principal Design Engineer - Physical Design
Cadence Design SystemsJob Title
Principal Design Engineer - Physical Design
Role Summary
Deliver physical implementation for high-speed DDR PHY IP on advanced process nodes. Own physical design tasks across product projects, improve the PD flow by developing scripts/tools, and define PPA optimization methodologies to meet performance, power, and area targets.
Experience Level
Senior level. Typical experience: BS with 7+ years or MS with 5+ years of relevant industry experience.
Responsibilities
Primary responsibilities include implementing physical design for high-speed IP and improving design flows.
- Perform physical implementation for high-speed DDR PHY IP (floorplanning, CTS, routing, timing closure).
- Develop scripts and small tools to automate and enhance the physical-design flow.
- Investigate and resolve design issues; create checks/flows to prevent recurrence.
- Analyze and summarize PPA optimization results; implement optimal design parameters for projects.
- Collaborate with product and verification teams to meet project schedules and deliverables.
Requirements
Must-have technical skills and experience; nice-to-have items listed separately.
- Strong physical-design experience in digital implementation: floorplanning, CTS, STA/timing closure, physical verification, and power analysis.
- Solid background in circuits, electronics, or physics and willingness to learn advanced process-node methodology.
- Proficient scripting skills (Perl, C-shell, TCL, Makefile, Python) to automate flows and tool interactions.
- Familiar with industry EDA tools such as Cadence Innovus, Synopsys ICC, Mentor Calibre, Cadence Tempus, and Synopsys PrimeTime.
- Experience optimizing PPA for high-frequency designs and producing repeatable sign-off flows.
- Good problem-solving skills and the ability to document and transfer design flows across projects.
- Nice-to-have: hands-on experience with TSMC/Samsung advanced nodes (2nm–12nm) and working on very high-frequency designs.
Education Requirements
BS (minimum 7+ years of relevant experience) or MS (minimum 5+ years of relevant experience). Relevant fields include Electrical Engineering, Computer Engineering, Electronics, Physics, or other related technical disciplines.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
