Principal Design Engineer (Design Eng 6)

Job Title

Principal Design Engineer (Design Eng 6)

Role Summary

Lead technical design work for complex digital integrated circuits or FPGAs within an engineering product team. Responsible for architecture, implementation guidance, cross-functional coordination, and delivery of production-quality silicon/FPGA designs.

Experience Level

Senior — principal-level engineering role. Specific years of experience not specified.

Responsibilities

Information not specified for this posting. Typical responsibilities for this role may include:

• Lead architecture and RTL design for digital ASIC/FPGA projects.
• Define design specifications, constraints, and verification strategy.
• Mentor and guide junior and mid-level engineers.
• Perform design reviews and ensure timing, power, and performance targets are met.
• Collaborate with verification, physical design, firmware, product, and manufacturing teams to drive designs to production.
• Support bring-up, validation, and post-silicon debug activities.

Requirements

Information not specified for this posting. Typical must-have and nice-to-have items for a principal design engineer:

• Must-have (typical): Significant experience in digital design using RTL (Verilog/VHDL), synthesis flows, timing closure, and simulation/verification methodologies; strong debugging and problem-solving skills; experience leading technical projects and mentoring engineers.
• Nice-to-have (typical): Experience with FPGA architecture, high-speed interfaces, low-power design techniques, scripting (Python, Tcl), and familiarity with EDA tool flows.

Education Requirements

Not specified.

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.