Cadence Design Systems logo

Principal Design Engineer - Controller

Cadence Design Systems
July 09, 2026
Full-time
On-site
Shanghai, China
Semiconductor IP Jobs, Level - Senior

Job Title

Principal Design Engineer - Controller

Role Summary

The Principal Design Engineer will lead architecture and RTL development for high-performance USB4 controller IP, driving design decisions, integration, verification, and delivery across frontend, PHY, firmware, and system teams.

Based in Shanghai, this role is responsible for delivering production-quality controller IP that meets power, performance, area, and product feature requirements.

Experience Level

Senior β€” requires 10+ years of industry experience and at least 8 years of hands-on ASIC/controller IP design experience.

Responsibilities

Lead technical design and delivery activities across architecture, RTL, integration, and validation. Key responsibilities include:

  • Define controller architecture, micro-architecture, and RTL for USB4 controller IP.
  • Implement key controller functions: register architecture, DMA/data movement flows, interrupt handling, link and power management, and host/system interfaces.
  • Lead frontend design from specification and micro-architecture through RTL implementation, subsystem integration, and design reviews.
  • Drive controller-to-PHY integration, including interface definition, bring-up readiness, interoperability, and cross-subsystem issue resolution.
  • Collaborate with verification, firmware, validation, and lab teams on test planning, coverage closure, bring-up, and post-silicon debug.
  • Provide technical guidance and mentoring to team members and promote engineering quality and execution excellence.
  • Partner with project management and global cross-functional teams to deliver IP on schedule and support customer delivery.
  • Explore and apply AI-assisted methods to improve engineering efficiency in design analysis, debugging, and automation.

Requirements

Must-have technical skills and experience:

  • 10+ years of relevant industry experience; 8+ years of hands-on ASIC/controller IP design experience.
  • Strong digital architecture and RTL design expertise and familiarity with verification methodology and end-to-end ASIC flows.
  • Experience with controller IP architecture and one or more industry-standard protocols at the controller, transaction, or link layer (e.g., USB, PCIe, Ethernet, MIPI).
  • Knowledge of AMBA-style bus interfaces, DMA architectures, descriptor-based transfers, register programming models, and interrupt systems.
  • Experience with controller-to-PHY integration and post-silicon validation.
  • Proven ability to provide technical leadership, mentor engineers, and influence cross-functional design direction.
  • Excellent communication skills in English and Mandarin; customer-focused and results-driven.

Preferred:

  • Direct experience with USB4 or USB 3.x controller architectures and developing high-speed interface Controller IP.
  • Experience in advanced process nodes and with controller-PHY interface standards such as PIPE, UTMI/ULPI.
  • Experience with embedded microcontrollers, DSPs, or firmware development related to controller IP.
  • Familiarity with Cadence ASIC design tools and AI-assisted engineering tools for productivity and debug.

Education Requirements

MS or BS degree in Electrical Engineering, Computer Engineering, or a related field (Master's or Bachelor's degree specified).


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

Cadence Design Systems logo

Date Posted: 2026-07-09