Principal Design Engineer

Job Title

Principal Design Engineer

Role Summary

Principal Design Engineer in the NVE Design Engineering Core group responsible for architecture, design, verification, and optimization of analog and mixed-signal circuits for NAND memory products. Acts as a technical authority on NAND circuit and algorithm development and coordinates across distributed functional teams.

Works closely with product engineering, test, process integration and manufacturing teams to optimize cost, performance, reliability and time-to-market.

Experience Level

Senior — requires 8+ years of relevant NAND design experience.

Responsibilities

Key responsibilities include technical leadership, circuit architecture, implementation, and cross-functional coordination for NAND projects.

• Serve as technical authority in analog/core functional team for NAND projects; lead pathfinding and solve complex technical problems.
• Architect NAND X-path/Y-path, algorithms, waveforms, and drive alignment of design solutions, methodologies and DTCO.
• Perform detailed competitive analysis, feasibility studies, and die-size cost/benefit analysis for new array circuits and algorithms.
• Design, simulate, optimize and floorplan NAND analog and mixed-signal circuits; validate via block- and chip-level simulations.
• Implement circuit designs to meet specifications and mentor other engineers on design and verification practices.
• Build and maintain Python-based utilities that integrate with EDA environments to accelerate environment setup, regression runs, automated documentation and predictive design/layout techniques.
• Coordinate project planning and deliverables to meet schedule milestones across geographies and time zones.
• Collaborate with Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to ensure manufacturability, reliability and cost targets.
• Review and produce user and technical documentation.

Requirements

Must-have technical skills, tools and behaviors for success in this role.

• Proficiency in analog/mixed-signal circuit design (page buffers, block selectors, X/Y decoders, bias tables and waveforms, PDNs, level shifters, IO buffers, RTL/Verilog).
• Strong fundamentals in semiconductor and device physics; familiarity with reliability issues such as CHC, NBTI, stress, snapback, electromigration (EM) and IR analysis.
• Proven circuit debugging, problem-solving, verification and optimization skills; experience guiding layout and parasitic extraction.
• Experience with analog and digital simulators (HSPICE, Fast SPICE) and Verilog for verification.
• Proficient coding skills in Python; experience with Bash/Tcl is a plus. Comfortable working with structured data (CSV/JSON/SQLite) and version control.
• Experience with Cadence toolflow, LVS/DRC and UNIX environments.
• High level of self-motivation, proactive work style, strong teamwork and good verbal/written English communication skills.

Education Requirements

MS in Electrical Engineering required; PhD preferred.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.