Principal CPU PPA Pathfinding Engineer

Job Title

Principal CPU PPA Pathfinding Engineer

Role Summary

Analyze, define, and evaluate power, performance, and area (PPA) options for future Qualcomm CPU projects. Provide data-driven trade-off analyses and actionable recommendations to CPU Leads and Product Managers to influence early CPU definition, implementation strategy, and roadmap choices.

Work cross-functionally with Architecture, RTL, Performance, Power, Physical Design, CAD, Process Technology, SoC, Thermal, and Product teams to produce repeatable PPA projections and pathfinding studies across market segments.

Experience Level

Senior-level. Requires extensive industry experience; role expects a senior engineer with significant track record in CPU or high-performance ASIC/SoC implementation.

Responsibilities

Lead pathfinding studies and produce credible, comparative PPA projections that guide CPU project decisions.

• Lead end-to-end CPU PPA pathfinding from concept exploration to implementation feasibility.
• Define and compare PPA options across microarchitecture, frequency targets, process node, libraries, voltage points, floorplans, clocking, and methodologies.
• Design and run implementation experiments and DOE frameworks to quantify trade-offs and identify optimization opportunities.
• Produce area, power, and frequency estimates and power-performance curves across workloads, operating points, process/library options, and thermal scenarios.
• Evaluate constrained-performance operating points (iso-power, iso-performance, iso-area, thermal limits) and recommend competitive design points for product segments.
• Partner with Performance, Power, Thermal, SoC, and Product teams to establish workload/system boundaries and translate CPU PPA into sustained product-level projections.
• Maintain and improve PPA evaluation methodologies, data quality, correlation, automation, and dashboards.
• Communicate trade-offs and recommended directions to technical leaders; mentor engineers and build scalable analysis flows.

Requirements

Must-have technical skills, practical experience, and professional abilities required to perform the role.

• 15+ years of relevant industry experience in CPU or high-performance ASIC/SoC implementation.
• Strong hands-on implementation experience: physical synthesis, floorplanning, place & route, clock tree synthesis, static timing analysis, power analysis, and signoff.
• Proven ability to evaluate and optimize power, performance, and area for high-frequency CPU cores or similarly complex designs.
• Deep understanding of critical paths, physical constraints, low-power techniques, and advanced-node design challenges.
• Ability to design controlled experiments, analyze large datasets, and derive clear engineering recommendations from results.
• Proficiency in scripting and automation (Python, Tcl, Perl, or similar).
• Excellent technical communication, cross-functional collaboration, mentoring, and problem-solving skills.
• Nice-to-have: hands-on experience with Cadence and/or Synopsys implementation and signoff tools; PPA modeling, thermal constraints, UPF-based flows, pre-to-post-silicon correlation, and competitive CPU analysis.

Education Requirements

Minimum qualifications specify either: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field plus 8+ years of relevant engineering experience; or Master’s degree in those fields plus 7+ years; or PhD in those fields plus 6+ years. Equivalent practical experience in related engineering roles is acceptable per the posted minimum qualifications.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.