Principal ASIC Engineer
Annapurna LabsJob Title
Principal ASIC Engineer
Role Summary
Work on the Silicon Optimization Engineering team to design and optimize ASIC hardware for large-scale data center deployments. The role focuses on physical implementation, methodology development, and cross-team collaboration to deliver silicon that meets power, performance, area, and quality targets.
Experience Level
Senior (Principal).
Technical senior role requiring substantial hands-on ASIC physical design experience; typical background includes multi-year experience in physical implementation and closure (e.g., 6+ years in ASIC physical design).
Responsibilities
Deliver physical implementation and optimization of complex ASIC blocks and drive related methodologies and reviews.
- Collaborate with RTL and logic designers on architectural feasibility and power-performance-area tradeoffs for physical closure.
- Lead block physical implementation tasks: synthesis, floorplanning, placement, routing, timing closure, IR drop analysis, power/clock distribution, congestion analysis, ECOs, and sign-off.
- Perform physical verification and support GDSII delivery processes.
- Develop and refine physical design methodologies and automation flows.
- Evaluate third-party IP from a physical-design perspective and define IP physical requirements.
- Mentor and collaborate with other physical design engineers and RTL/architecture teams to resolve implementation challenges.
Requirements
Must-have technical skills and domain experience.
- 6+ years of ASIC physical design experience from RTL to GDSII, including synthesis, place-and-route, and timing closure.
- Hands-on experience with modern process nodes (examples: 7nm, 14/16nm, 20nm, 28nm).
- Proficiency with physical-design CAD tools (Cadence, Mentor Graphics, Synopsys or similar) across the implementation flow.
- Scripting experience in Tcl, Perl, or Python for flow automation and tool integration.
- Solid knowledge of device physics and custom/semi-custom implementation techniques relevant to physical design.
- Experience integrating IP and resolving physical-domain IP issues (timing, power, congestion, signoff).
- Practical experience addressing interface and protocol-related physical challenges (e.g., DDR, PCIe).
- Demonstrated ability to mentor junior engineers and work effectively across teams.
Education Requirements
Posting specifies a Bachelor's degree with 12+ years of experience or a Master's degree with 8+ years in Electrical Engineering or Computer Science. No certifications were specified.
About the Company
Company: Annapurna Labs
Headquarters: Cupertino, CA, USA
Annapurna Labs is a semiconductor design company within Amazon Web Services that develops custom SoCs, ASICs and networking processors for cloud data centers and storage infrastructure.
