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Principal Applications Engineer, High-Speed Interface Protocols

Cadence Design Systems
July 09, 2026
Full-time
On-site
San Jose, California, United States
$123,200 - $228,800 USD yearly
Semiconductor IP Jobs, Level - Senior

Job Title

Principal Applications Engineer, High-Speed Interface Protocols

Role Summary

As a Principal Applications Engineer you will architect and demonstrate high-speed interface solutions using Cadence Serdes PHY and controller IPs (PCIe, CXL, Ethernet, USB, etc.). This is a customer-facing role in the Technical Field Organization supporting presales, customer education, IP performance demonstrations, and cross-functional initiatives to grow the IP business.

California annual salary range: $123,200 to $228,800 (may be eligible for bonus, equity, and benefits).

Experience Level

Senior level. Typical experience expectations: MS in EE/CE (or equivalent) with ~10+ years, or BS in EE/CE (or equivalent) with ~15+ years of relevant experience.

Responsibilities

Key responsibilities include:

  • Support technical presales and configure high-speed interface IP, including PCIe, CXL, Ethernet PHY and controllers.
  • Present Cadence IP portfolio and capabilities to prospective customers and at industry events.
  • Serve as product expert for digital controller and PHY IPs and related protocols.
  • Collaborate with IP sales, marketing, and R&D teams to define solutions and win opportunities.
  • Demonstrate IP performance and provide quick-turn technical support to customers, field teams, architects, and designers.
  • Write application notes and technical articles; develop demos and lab validations as needed.
  • Lead internal process improvements and initiatives to increase team productivity and support business growth.
  • Occasional travel to customer sites may be required.

Requirements

Must-have technical skills and capabilities:

  • Deep knowledge of high-speed interface protocols such as PCIe, CXL, UCIe, Ethernet, USB, MIPI and high data rates (e.g., 224G, 112G).
  • Strong understanding of PHY and/or controller implementations for one or more protocols.
  • Proven individual leadership and initiative in managing presales accounts and customer-facing engagements.
  • Excellent presentation, verbal, and written communication skills.
  • Ability to travel to customer sites occasionally.

Nice-to-have:

  • Lab validation and demo setup skills.
  • Experience with controller and/or PHY verification.
  • Familiarity with AXI and PIPE interface protocols.

Education Requirements

BS in Electrical Engineering, Computer Engineering or a related field with 15+ years of relevant work experience, or MS in Electrical Engineering, Computer Engineering or equivalent with 10+ years of relevant work experience. Equivalent practical experience is accepted.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-07-09