Principal Applications Engineer, High-Speed Interface Protocols
As a Principal Applications Engineer you will architect and demonstrate high-speed interface solutions using Cadence Serdes PHY and controller IPs (PCIe, CXL, Ethernet, USB, etc.). This is a customer-facing role in the Technical Field Organization supporting presales, customer education, IP performance demonstrations, and cross-functional initiatives to grow the IP business.
California annual salary range: $123,200 to $228,800 (may be eligible for bonus, equity, and benefits).
Senior level. Typical experience expectations: MS in EE/CE (or equivalent) with ~10+ years, or BS in EE/CE (or equivalent) with ~15+ years of relevant experience.
Key responsibilities include:
Must-have technical skills and capabilities:
Nice-to-have:
BS in Electrical Engineering, Computer Engineering or a related field with 15+ years of relevant work experience, or MS in Electrical Engineering, Computer Engineering or equivalent with 10+ years of relevant work experience. Equivalent practical experience is accepted.
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
