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Principal Applications Engineer

Synopsys
August 27, 2026
Full-time
On-site
Sunnyvale, California, United States
DFT Jobs, Level - Senior

Job Title

Principal Applications Engineer

Role Summary

Senior applications engineer in the Hardware and Test organization focused on Design-For-Test (DFT) and ATPG technologies. The role leads technical resolutions for customer deployments, drives methodology and tool integration, and partners with R&D, product, and field teams to improve test flows and debug workflows.

Experience Level

Level - Senior. Typical experience: Master's degree with ~8+ years or Bachelor's degree with ~10+ years; equivalent practical experience accepted.

Responsibilities

Primary responsibilities include technical leadership for DFT deployments, customer engagement, and cross-functional coordination.

  • Lead technical resolution of test technology deployments, escalations, and customer issues.
  • Advise on test compression, scan integration, and test-vector generation requirements and priorities.
  • Define and enforce best practices for design test methodology reviews, signoff checklists, and field engagement models.
  • Drive AI-enabled flow initiatives and improve integration/debug workflows using TestMAX or equivalent tools.
  • Create feedback loops with R&D and Product to improve tool quality, documentation, and enablement.
  • Perform trend analysis on field issues to strengthen deployment quality and reduce tape-out risk.
  • Support critical tape-out schedules and occasional onsite customer engagements.

Requirements

Must-have technical skills and experience. Educational degree requirements are listed under Education Requirements below and removed from this section.

  • Hands-on DFT experience for SoC and ASIC development, including customer-facing applications engineering.
  • Deep expertise in ATPG, DFT, BIST, and logic test methodologies.
  • Practical experience with TestMAX DFT, TestMAX ATPG, TestMAX Manager, or equivalent toolsets.
  • Experience integrating DFT into synthesis flows and creating tester-ready ATPG vectors to support tape-out handoffs.
  • Strong execution skills: technical planning, risk management, escalation leadership, and clear stakeholder communication.
  • Ability to work across multiple programs with rigor and urgency; willingness to travel occasionally for critical engagements.
  • Nice-to-have: prior support in competitive accounts or extensive tape-out support history.

Education Requirements

Bachelor's degree (with ~10+ years experience) or Master's degree (with ~8+ years experience) in Electrical Engineering, Computer Engineering, or equivalent practical experience. Equivalent practical experience is explicitly acceptable in lieu of a listed degree.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-08-26