Principal Application Engineer (STA - SignOff)

Job Title

Principal Application Engineer (STA - SignOff)

Role Summary

Provide pre-sales and post-sales technical support for Cadence Digital Implementation and Signoff tools. Work with sales, customers, and R&D to deliver demonstrations, benchmarks, workshops, methodology consultations and production support to drive evaluations and deployments.

Focus areas include synthesis, place & route, timing/physical/power signoff, and methodology improvement for timing closure.

Experience Level

Senior level. Target candidates typically have 8+ years of relevant experience; see Education Requirements for specific experience guidance.

Responsibilities

Primary duties include technical enablement, customer engagement, and collaboration with sales and engineering.

• Deliver product demonstrations, workshops, benchmarks, and methodology consultations for Digital Implementation and Signoff flows.
• Support pre-sales campaigns and identify product opportunities with account teams.
• Execute technical evaluations and drive proof-of-concept and benchmark implementations.
• Provide ongoing customer support and promote tool adoption both on- and off-site.
• Collaborate with R&D to improve tools and methodologies and contribute technical content to support resources.
• Travel as required (up to 20%).

Requirements

Must-have technical skills and professional attributes.

• Strong knowledge of digital design fundamentals and semiconductor concepts.
• Deep expertise in Static Timing Analysis (STA) and timing signoff processes, including advanced-node STA, UPF, constraints debugging, hierarchical and 3DIC STA and closure solutions.
• Experience with ASIC digital implementation flows and tools is preferred.
• Proficiency in at least one scripting language (TCL, Perl, or Python).
• Strong customer-facing communication, problem solving, and written communication skills.
• Self-driven, continuous learner comfortable working with cross-functional teams.

Education Requirements

Minimum: Bachelor of Science in Electrical Engineering (BS-EE) plus 8–10 years' experience, or Master of Science in Electrical Engineering (MS-EE) plus 6–8 years' experience.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.