Skip to main content
K

Principal Analog Mixed Signal Engineer

knowledge Artisan
October 23, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Device Engineering Jobs, Level - Senior

Job Title

Principal Analog Mixed Signal Engineer

Role Summary

Senior technical leader responsible for end-to-end analog and mixed-signal IP and subsystem development for ASIC/SoC products. The role owns architecture, circuit design, verification, layout supervision, tape-out activities, silicon bring-up, characterization, and production support.

Works with cross-functional teams and customers to define requirements, drive technical decisions, and mentor engineering staff to deliver production-quality AMS IP.

Experience Level

Senior - typically 12–18 years of relevant Analog/Mixed-Signal IC/ASIC/SoC development experience.

Responsibilities

Deliver and lead AMS IP and subsystem development from concept through production; provide technical leadership and hands-on circuit work as required.

  • Own AMS IP/ subsystem lifecycle: requirements, architecture, design, verification, layout review, signoff, tape-out, silicon bring-up, characterization, and production support.
  • Define system- and block-level architectures and technical roadmaps; drive design trade-offs for performance, power, area, reliability, and cost.
  • Design and review analog blocks including clocking/timing (PLL, DLL, oscillators, charge pumps), data converters (ADC/DAC, comparators, references), power management (LDOs, bandgaps, bias circuits) and high-speed/interface analog blocks (SerDes/PHY, MIPI/USB/PCIe/DDR-related blocks).
  • Develop and review verification plans: PVT/corner/Mont e Carlo/mismatch/noise/reliability analyses and post-layout simulation to ensure spec compliance and design margins.
  • Lead layout reviews and advise on matching-sensitive layouts, common-centroid structures, guard rings, power/ground implementation, noise isolation, and parasitic extraction.
  • Lead silicon bring-up, debug circuit/IP/system-level issues, correlate silicon results to simulation, and drive characterization and yield-improvement activities.
  • Mentor and guide engineers, lead architecture and design reviews, identify technical risks and mitigation strategies, and establish engineering best practices.
  • Participate in customer technical discussions and collaborate with digital design, physical design, packaging, test, validation, and program management teams.

Requirements

Must-have technical skills, tools, and experience for successful performance in this role.

  • 12–18 years of hands-on Analog/Mixed-Signal IC design experience, with multiple successful silicon tape-outs.
  • Deep transistor- and circuit-level expertise across PLLs, ADC/DAC, comparators, references, LDOs, bandgaps, power management, and high-speed analog interface blocks.
  • Practical experience with Cadence Virtuoso, Spectre/SpectreAPS, ADE (XL/Explorer/Assembler), HSPICE, MATLAB/Simulink.
  • Strong AMS verification skills: Verilog-A/Verilog-AMS, mixed-signal simulation, PVT/corner/Monte Carlo/mismatch/noise/reliability analysis, and AMS signoff practices.
  • Physical verification and layout oversight experience: DRC/LVS/ERC, parasitic/RC extraction, post-layout simulation, and layout review/closure.
  • Experience across CMOS process nodes from 180nm to advanced nodes and familiarity with process-related analog design challenges (variation, mismatch, parasitics, leakage, noise).
  • Proven silicon bring-up, characterization, debugging, and production ramp support experience.
  • Demonstrated ability to lead technical teams, make architecture/circuit decisions, and communicate with customers and cross-functional teams.

Nice-to-have:

  • Experience with FinFET technologies and advanced node analog design.
  • Exposure to SerDes, MIPI, USB, PCIe, DDR PHYs, automotive or safety-critical semiconductor products, and low-power analog design.
  • Knowledge of functional safety standards (ISO 26262, IEC 61508) and reliability-aware analog design.
  • Scripting/automation skills: Python, Perl, TCL for simulation and design-flow automation.

Education Requirements

B.E./B.Tech or M.E./M.Tech in Electronics Engineering, Electrical Engineering, VLSI, Microelectronics, Electronics & Communication Engineering, or a related engineering discipline. Preferred familiarity with functional-safety standards such as ISO 26262 and IEC 61508 is noted.


About the Company

Company: knowledge Artisan

A global engineering and technology services organization specializing in product engineering, semiconductor engineering, embedded systems, and digital transformation. Provides end-to-end semiconductor product development services including ASIC/SoC design, analog and mixed-signal engineering, verification, physical design, silicon validation, and production support across industries like automotive, communications, consumer electronics, and industrial automation.

knowledge Artisan logo

Date Posted: 2026-10-23