Principal Analog Design Engineer - Mixed-Signal PHY (Clocking / High-Speed I/O)

Job Title

Principal Analog Design Engineer - Mixed-Signal PHY (Clocking / High-Speed I/O)

Role Summary

Join Micron's Interface Pathfinding team to design and validate high-speed PHY analog building blocks for chip-to-chip and memory interconnects. This role focuses on original analog circuit development for clocking, transmitter, and receiver subsystems and requires ownership from specification through post-silicon characterization.

Experience Level

Senior — requires substantial senior-level experience; role listing specifies 10+ years of analog/mixed-signal IC build experience.

Responsibilities

The engineer will lead custom analog circuit development and contribute to PHY-level analog architecture decisions.

• Lead development of specialized analog components with emphasis on clocking (PLL, DLL, CDR) and transmitter/receiver circuits.
• Define top-level analog architecture, clocking topology, and signal-chain partitioning for PHYs.
• Own the full lifecycle: specifications, transistor-level implementation, verification, and post-silicon characterization.
• Build and maintain transistor-level simulation testbenches; run process-corner, Monte Carlo, and mismatch analyses to assess margin and yield sensitivity.
• Define clear interface specifications between custom analog blocks and digital control wrappers.
• Collaborate with layout engineers to guide custom analog layout and support lab-based post-silicon bring-up and measurements.

Requirements

Must-have technical skills and experience; preferred items follow.

• 10+ years of analog/mixed-signal IC build experience with at least one tape-out in a primary circuit ownership role.
• Deep expertise in clocking circuits (PLL, DLL, or CDR) including transistor-level implementation in advanced CMOS nodes.
• Strong transistor-level simulation skills (HSpice or equivalent) and comfort with corner, Monte Carlo, and mismatch analyses for yield-aware development.
• Proven understanding of jitter analysis and its impact on high-speed link timing margins.
• Demonstrated ability to own primary circuit designs and drive them through to silicon and characterization.
• Ability to use AI/ML/LLMs to improve productivity and design efficiency.
• Preferred: experience with high-speed transmitter architectures (pre-emphasis, swing control, impedance matching) and receiver techniques (CTLE/DFE, samplers, calibration).
• Preferred: familiarity with short-reach PHY architectures (UCIe, AIB, BoW or similar), OTP/fuse-based calibration, and analog trim loops.
• Preferred: post-silicon characterization experience correlating simulation to measured eye diagrams, BER curves, phase noise, and jitter histograms.

Education Requirements

BS, MS, or PhD in Electrical Engineering or a related field, or equivalent practical experience.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.