Principal Analog Design Engineer

Job Title

Principal Analog Design Engineer

Role Summary

Lead design, integration, and delivery of analog and mixed-signal IP for High Bandwidth Memory (HBM) logic dies. Provide technical leadership across analog design, IP integration, system alignment, and silicon execution to achieve high bandwidth, power efficiency, and reliability targets.

Experience Level

Senior-level - approximately 10–15+ years of experience in analog/mixed-signal IC design and build.

Responsibilities

Accountable for end-to-end analog subsystem delivery within HBM logic die projects, from circuit design through silicon validation.

• Lead and own design of high-speed transmitters and receivers, SerDes-related analog blocks, and clocking circuits (PLLs, DLLs, CDRs).
• Design biasing, reference, calibration, and power delivery/regulation circuits (LDOs, regulators).
• Define and drive IP interfaces, power domains, clocking schemes, and reset strategies across subsystems.
• Perform detailed pre-layout and post-layout simulations, extraction, and modeling (SPICE).
• Conduct PVT, Monte Carlo, mismatch, and aging analyses; address noise, jitter, SI/PI, and cross-domain coupling.
• Collaborate with layout engineers on floorplanning, matching, shielding, EM/IR compliance, and sign off on analog layouts.
• Drive layout-aware build optimizations for advanced process nodes and establish guidelines for analog build, documentation, and reuse.
• Coordinate cross-functional work with analog, digital, system, packaging, and test teams; support silicon bring-up and lab validation.

Requirements

Must-have technical skills and experience for successful performance in this role.

• ~10–15+ years of practical experience in analog/mixed-signal IC design and build.
• Proven expertise in high-speed interface design and clocking circuits (PLL/DLL/CDR).
• Strong experience with power management circuits and power delivery/regulation design.
• Experience with analog IP integration at subsystem or SoC level.
• Proficiency in SPICE simulation, extraction, modeling, and layout-aware design practices.
• Hands-on experience with silicon bring-up, lab validation, and failure analysis.
• Deep understanding of advanced CMOS processes and signal/power integrity issues (noise, jitter, SI/PI).
• Ability to collaborate across layout, digital, system, packaging, and test teams and to author technical documentation and build guidelines.

Education Requirements

MS or PhD in Electrical Engineering or a closely related technical field.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.